r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 687

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 32.13
When the FMR 22 bit is set to 1 (suspend request enabled by interrupt request), the FMR21 bit is automatically
set to 1 (suspend request) when an interrupt request is generated during auto-erasure. Set the FMR22 bit to 1
when suspend is used while the user ROM area is auto-erased in EW1 mode.
Notes:
1. The interrupt vector table and interrupt routine for interrupts to be used must be allocated to an area other than
2. td(SR-SUS) is required from when the maskable interrupt is generated until suspend is acknowledged.
Suspend Enabled)
Block Erase Flowchart in EW1 Mode (Flash Ready Status Interrupt Disabled and
the programming target area.
The interrupt to enter suspend must be enabled beforehand.
Write the command code
20h
Write D0h to any block
address
I = 1 (interrupt enabled)
Block erase completed
NOP instruction × 4
Full status check
FMR20 = 1
FMR22 = 1
FST7 = 1 ?
FST6 = 0 ?
Start
Yes
Yes
No
No
I: Flag in CPU register
FST7: Bit in FST register
FMR20, FMR21, FMR22: Bits in FMR2 register
Access the flash memory
Maskable interrupt
FMR21 = 0
REIT
(1)
32. Flash Memory
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