r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 713

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
Figure 34.2
Table 34.8
Notes:
−
−
−
−
−
t
−
−
t
READY)
−
−
−
−
d(SR-SUS)
d(CMDRST-
Symbol
1. V
2. Definition of programming/erasure endurance
3. Endurance to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
4. In a system that executes multiple programming operations, the actual erasure count can be reduced by writing to sequential
5. If an error occurs during block erase, attempt to execute the clear status register command, then execute the block erase
6. Customers desiring program/erase failure rate information should contact their Renesas technical support representative.
7. − 40 ° C for D version.
8.
The programming and erasure endurance is defined on a per-block basis.
If the programming and erasure endurance is n (n = 10,000), each block can be erased n times. For example, if 1,024 1-byte
writes are performed to different addresses in block A, a 1 Kbyte block, and then the block is erased, the
programming/erasure endurance still stands at one.
However, the same address must not be programmed more than once per erase operation (overwriting prohibited).
addresses in turn so that as much of the block as possible is used up before performing an erase operation. For example,
when programming groups of 16 bytes, the effective number of rewrites can be minimized by programming up to 128 groups
before erasing them all in one operation. In addition, averaging the erasure endurance between blocks A to D can further
reduce the actual erasure endurance. It is also advisable to retain data on the erasure endurance of each block and limit the
number of erase operations to a certain number.
command at least three times until the erase error does not occur.
The data hold time includes time that the power supply is off or the clock is not supplied.
CC
= 2.7 to 5.5 V and T
Suspend request
FST6, FST7: Bit in FST register
FMR21: Bit in FMR2 register
Program/erase endurance
Byte program time
(program/erase endurance ≤ 1,000 times)
Byte program time
(program/erase endurance > 1,000 times)
Block erase time
(program/erase endurance ≤ 1,000 times)
Block erase time
(program/erase endurance > 1,000 times)
Time delay from suspend request until
suspend
Interval from erase start/restart until
following suspend request
Time from suspend until erase restart
Time from when command is forcibly
stopped until reading is enabled
Program, erase voltage
Read voltage
Program, erase temperature
Data hold time
Flash Memory (Data flash Block A to Block D) Electrical Characteristics
Time delay until Suspend
(FMR21 bit)
FST7 bit
FST6 bit
(8)
Parameter
opr
= − 20 to 85 ° C (N version) / − 40 to 85 ° C (D version), unless otherwise specified.
(2)
Ambient temperature = 55 ° C
Fixed time
Conditions
t
d(SR-SUS)
Clock-dependent
time
10,000
− 20
Min.
2.7
1.8
20
−
−
−
−
−
0
−
−
(7)
(3)
Access restart
34. Electrical Characteristics
Typ.
Standard
160
300
0.2
0.3
−
−
−
−
−
−
−
−
−
30+CPU clock
30+CPU clock
5+CPU clock
× 3 cycles
× 1 cycle
× 1 cycle
1,500
1,500
Max.
Page 681 of 740
5.5
5.5
85
−
1
1
−
−
times
year
Unit
ms
µ s
µ s
µ s
µ s
µ s
° C
V
V
s
s