r5f21346mnfp Renesas Electronics Corporation., r5f21346mnfp Datasheet - Page 81

• Manufacturer Part Number: r5f21346mnfp
• Description: Single-chip Mcus Incorporates The R8c Cpu Core
• Manufacturer: Renesas Electronics Corporation.

R8C/34M Group
R01UH0131EJ0100 Rev.1.00
Jun 21, 2011
6.2.9
Notes:
1. The OFS register is allocated in the flash memory, not in the SFRs. Set appropriate values as ROM data by a
2. The same level of the voltage detection 0 level selected by bits VDSEL0 and VDESL1 is set in both functions of
3. To use power-on reset and voltage monitor 0 reset, set the LVDAS bit to 0 (voltage monitor 0 reset enabled after
LVDAS Bit (Voltage Detection 0 Circuit Start Bit)
Bit
b0
b1
b2
b3
b4
b5
b6
b7
After Reset
program.
Do not write additions to the OFS register. If the block including the OFS register is erased, the OFS register is
set to FFh.
When blank products are shipped, the OFS register is set to FFh. It is set to the written value after written by the
user.
When factory-programming products are shipped, the value of the OFS register is the value programmed by the
user.
voltage monitor 0 reset and power-on reset.
reset).
For a setting example of the OFS register, refer to 13.3.1 Setting Example of Option Function Select Area.
The Vdet0 voltage to be monitored by the voltage detection 0 circuit is selected by bits VDSEL0 and VDSEL1.
Address 0FFFFh
Symbol CSPROINI LVDAS
CSPROINI Count source protection mode
ROMCP1 ROM code protect bit
WDTON Watchdog timer start select bit
ROMCR ROM code protect disable bit
VDSEL0 Voltage detection 0 level select bit
VDSEL1
Symbol
LVDAS
Option Function Select Register (OFS)
—
Bit
Reserved bit
Voltage detection 0 circuit start bit
after reset select bit
b7
b6
Bit Name
VDSEL1 VDSEL0 ROMCP1 ROMCR
b5
User Setting Value
b4
(3)
(2)
0: Watchdog timer automatically starts after reset
1: Watchdog timer is stopped after reset
Set to 1.
0: ROM code protect disabled
1: ROMCP1 bit enabled
0: ROM code protect enabled
1: ROM code protect disabled
b5 b4
0: Voltage monitor 0 reset enabled after reset
1: Voltage monitor 0 reset disabled after reset
0: Count source protect mode enabled after reset
1: Count source protect mode disabled after reset
0 0: 3.80 V selected (Vdet0_3)
0 1: 2.85 V selected (Vdet0_2)
1 0: 2.35 V selected (Vdet0_1)
1 1: 1.90 V selected (Vdet0_0)
b3
(1)
b2
Function
b1
—
6. Voltage Detection Circuit
WDTON
b0
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R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W