an87c196kt Intel Corporation, an87c196kt Datasheet

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an87c196kt

Manufacturer Part Number
an87c196kt
Description
Advanced 16-bit Chmos Microcontroller
Manufacturer
Intel Corporation
Datasheet

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The 87C196Kx devices represents the 4th generation of MCS 96 microcontroller products implemented on
Intel’s advanced 1 micron process technology These products are based on the 80C196KB device with
enhancements ideal for automotive applications The instruction set is a true super set of the 80C196KB with a
few new instructions
The MCS 96 microcontroller family members are all high performance microcontrollers with a 16-bit CPU The
87C196KT is composed of the high speed (16 MHz) KX macrocore as well as the following peripherals Up to
32 Kbytes of Program EPROM up to 1 Kbytes of Register RAM (00-3FFH including SFRs) up to 512 bytes of
code RAM (16-bit addressing modes) with the ability to execute from this RAM space an eight channel-10 Bit
asynchronous synchronous serial I O port (8096 compatable) with a dedicated 16-bit baud rate generator an
additional synchronous serial I O port with full duplex master slave transceivers a flexible timer counter
structure with prescaler cascading and quadrature capabilities 10 modularized multiplexed high speed I O
for capture and compare (called Event Processor Array) with 250 ns resolution and double buffered inputs
and a sophisticated prioritized interrupt structure with programmable Peripheral Transaction Server (PTS) The
PTS has several channel modes including single burst block transfers from any memory location to any
memory location a PWM and PWM toggle mode to be used in conjunction with the EPA and an A D scan
mode
Additional SFR space is allocated for the EPA and can be ‘‘windowed’’ into the lower Register RAM area
This datasheet contains information on products in production The specifications are subject to change
without notice Verify with your local Intel Sales office that you have the latest data sheet before finalizing a
design
g
3LSB analog to digital converter with programmable S H times with conversion times
High Performance CHMOS 16-Bit CPU
Up to 32 Kbytes of On-Chip EPROM
Up to 1 Kbyte of On-Chip Register RAM
Up to 512 Bytes of Additional RAM
(Code RAM)
Register-Register Architecture
8 Channel 10-Bit A D with Sample Hold
37 Prioritized Interrupt Sources
Up to Seven 8-Bit (56) I O Ports
Full Duplex Serial I O Port
Dedicated Baud Rate Generator
Interprocessor Communication Slave
Port
Selectable Bus Timing Modes for
Flexible Interfacing
Oscillator Fail Detection Circuitry
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
Other brands and names are the property of their respective owners
ADVANCED 16-BIT CHMOS MICROCONTROLLER
COPYRIGHT
87C196KT 87C196KS
(
INTEL CORPORATION 1995
b
40 Ct o
Automotive
November 1995
NOTICE
a
125 C Ambient)
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High Speed Peripheral Transaction
Server (PTS)
Two Dedicated 16-Bit High-Speed
Compare Registers
10 High Speed Capture Compare (EPA)
Full Duplex Synchronous Serial I O
Port (SSIO)
Two Flexible 16-Bit Timer Counters
Quadrature Counting Inputs
Flexible 8- 16-Bit External Bus
(Programmable)
Programmable Bus (HLD HLDA)
1 75 ms 16 x 16 Multiply
3 ms 32 16 Divide
68-Pin PLCC Package
k
Order Number 270999-007
20 ms at 16 MHz an
1

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an87c196kt Summary of contents

Page 1

... Port (SSIO) Two Flexible 16-Bit Timer Counters Y Quadrature Counting Inputs Y Flexible 8- 16-Bit External Bus Y (Programmable) Programmable Bus (HLD HLDA Multiply Divide Y 68-Pin PLCC Package Y NOTICE November 1995 INTEL CORPORATION 1995 MHz an Order Number 270999-007 1 ...

Page 2

Device Pins Package EPROM 87C196KT 68-Pin PLCC 32K 87C196KS 68-Pin PLCC 24K NOTE This is a PRODUCT PREVIEW DATA SHEET The AC and DC parameters contained within this data sheet may change after full automotive temperature characterization of ...

Page 3

Block Diagram 87C196KT 87C196KS 270999 – 1 270999 – ...

Page 4

PIN DESCRIPTIONS Symbol V Main supply voltage ( Digital circuit ground (0V) There are three V SS SSI SSI V Reference for the A D converter ( REF portion of the A D converter ...

Page 5

PIN DESCRIPTIONS (Continued) Symbol P5 5 BHE WRH Byte High Enable or Write High output as selected by the CCR BHE bank of memory that is connected to the high byte of the data bus A0 that bank of memory ...

Page 6

CCB (2018H Byte ‘‘1’’ Enables Powerdown 1 BW0 e See Table ‘‘1’’ WR BHE - ‘‘0’’ WRL WRH ALE ‘‘1’’ ALE - ‘‘0’’ ADV e 4 ...

Page 7

ABSOLUTE MAXIMUM RATINGS b Storage Temperature Voltage from ANGND Voltage from Any Other Pin ANGND SS This includes V on ROM ...

Page 8

DC CHARACTERISTICS (Under Listed Operating Conditions) (Continued) Symbol Parameter V Output Low Voltage OL (Outputs Configured as Complementary) V Output High Voltage OH (Outputs Configured as Complementary) I Input Leakage Current (Std Inputs Input Leakage Current ...

Page 9

AC CHARACTERISTICS (Over Specified Operating Conditions) Test Conditions Capacitance Load on All Pins The 87C196KT will meet these specifications Symbol Parameter F Frequency on XTAL1 XTAL T XTAL1 Period (1 F OSC XTAL T XTAL1 High to CLKOUT High or ...

Page 10

AC CHARACTERISTICS (Over Specified Operating Conditions) Test Conditions Capacitance Load on All Pins The system must meet these specifications to work with the 87C196KT Symbol Parameter T Address Valid to Ready Setup AVYV T ALE Low to READY ...

Page 11

SYSTEM BUS TIMING If mode 0 operation is selected add 2 Tosc to this time 87C196KT 87C196KS 270999 – ...

Page 12

READY TIMINGS (ONE WAIT STATE) If mode 0 selected one wait state is always added If additional wait states are required add 2 Tosc to these specifica- tions 87C196KT BUSWIDTH TIMINGS If mode 0 selected add 2 ...

Page 13

HOLD HOLDA TIMINGS (Over Specified Operation Conditions) Test Conditions Capacitance Load on All Pins Symbol T HOLD Setup Time HVCH T CLKOUT Low to HLDA Low CLHAL T CLKOUT Low to BREQ Low CLBRL T HLDA Low to Address Float ...

Page 14

BUS MODE 1 AC CHARACTERISTICS Test Conditions Capacitance Load on All Pins The 87C196KT will meet these specifications Symbol Parameter F Frequency on XTAL1 XTAL T XTAL1 Period (1 F OSC XTAL T XTAL1 High to CLKOUT High ...

Page 15

BUS MODE 1 AC CHARACTERISTICS Test Conditions Capacitance Load on All Pins The system must meet these specifications to work with the 87C196KT Symbol Parameter T Address Valid to Ready Setup AVYV T ALE Low to READY Setup LLYV T ...

Page 16

MODE 1 87C196KT SYSTEM BUS TIMING 16 270999 – ...

Page 17

BUS MODE 1 HOLD HOLDA TIMINGS Test Conditions Capacitance Load on All Pins Symbol T HOLD Setup Time HVCH T CLKOUT Low to HLDA Low CLHAL T CLKOUT Low to BREQ Low CLBRL T HLDA Low to Address Float AZHAL ...

Page 18

BUS MODE 2 AC CHARACTERISTICS Test Conditions Capacitance Load on All Pins The 87C196KT will meet these specifications Symbol Parameter F Frequency on XTAL1 XTAL T XTAL1 Period (1 F OSC XTAL T XTAL1 High to CLKOUT High ...

Page 19

BUS MODE 2 AC CHARACTERISTICS Test Conditions Capacitance Load on All Pins The system must meet these specifications to work with the 87C196KT Symbol Parameter T Address Valid to Ready Setup AVYV T ALE Low to READY Setup LLYV T ...

Page 20

MODE 2 87C196KT SYSTEM BUS TIMING 20 270999 – ...

Page 21

MODE 2 87C196KT READY TIMINGS (ONE WAIT STATE) MODE 2 87C196KT BUSWIDTH TIMINGS 87C196KT 87C196KS 270999 – 13 270999 – ...

Page 22

BUS MODE 2 HOLD HOLDA TIMINGS Test Conditions Capacitance Load on All Pins Symbol T HOLD Setup Time HVCH T CLKOUT Low to HLDA Low CLHAL T CLKOUT Low to BREQ Low CLBRL T HLDA Low to Address ...

Page 23

AC CHARACTERISTICS SLAVE PORT SLAVE PORT WAVEFORM (SLPL e SLAVE PORT TIMING (SLPL Symbol Parameter T Address Valid to WR Low SAVWL T RD High to Address Valid SRHAV T RD Low Period SRLRH T WR ...

Page 24

AC CHARACTERISTICS SLAVE PORT SLAVE PORT WAVEFORM (SLPL e SLAVE PORT TIMING (SLPL Symbol Parameter T CS Low to ALE Low SELLL High to CS High SRHEH T ALE Low to ...

Page 25

... Timing measurements are made for a logic ‘‘1’’ and 0 8V for logic ‘‘0’’ THERMAL CHARACTERISTICS Device and Package i JA AN87C196KT (68-Lead PLCC) NOTES Thermal resistance between junction and the sur- ...

Page 26

EPROM SPECIFICATIONS AC EPROM PROGRAMMING CHARACTERISTICS Operating Conditions Load Capacitance e ANGND 25V Symbol Paramter T Address Setup Time AVLL T Address Hold Time LLAX ...

Page 27

EPROM PROGRAMMING WAVEFORMS SLAVE PROGRAMMING MODE DATA PROGRAM MODE WITH SINGLE PROGRAM PULSE SLAVE PROGRAMMING MODE IN WORD DUMP OR DATA VERIFY MODE WITH AUTO INCREMENT 87C196KT 87C196KS 270999 – 19 270999 – ...

Page 28

SLAVE PROGRAMMING MODE TIMING IN DATA PROGRAM MODE WITH REPEATED PROG PULSE AND AUTO INCREMENT AC CHARACTERISTICS SERIAL PORT-SHIFT REGISTER MODE SERIAL PORT TIMING SHIFTING REGISTER MODE Test Conditions 125 C ...

Page 29

WAVEFORM SERIAL PORT SHIFT REGISTER MODE SERIAL PORT WAVEFORM SHIFT REGISTER MODE CHARACTERISTICS The sample and conversion time of the A D convert the 8-bit or 10-bit modes is programmed by loading a byte into ...

Page 30

MODE A D OPERATING CONDITIONS Symbol Description T Ambient Temperature A V Digital Supply Voltage CC V Analog Supply Voltage REF T Sample Time SAM T Conversion Time CONV F Oscillator Frequency OSC NOTES 1 V must ...

Page 31

MODE A D OPERATING CONDITIONS Symbol Description T Ambient Temperature A V Digital Supply Voltage CC V Analog Supply Voltage REF T Sample Time SAM T Conversion Time CONV F Oscillator Frequency OSC NOTES 1 V must be within ...

Page 32

KS ERRATA The following is a list of all known functional devia- tions for 87C196KT KS devices B-step and later devices can be identified by a special mark following the eight digit FPO number on the top ...

Page 33

KS DESIGN CONSIDERATIONS 1 EPA TIMER RESET WRITE CONFLICT If the user writes to the EPA timer at the same time that the timer is reset it is indeterminate which will take precedence Users should not write to a ...

Page 34

DATA SHEET REVISION HISTORY This is the -007 revision of the 8XC196KT KS Data Sheet The following differences exist between the -006 revision and the -007 revision 1 V estimate added OL3 2 ‘‘Voltage on Analog Input Pin’’ ...

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