w78e051c Winbond Electronics Corp America, w78e051c Datasheet
w78e051c
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w78e051c Summary of contents
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... Port Access Cycle......................................................................................................... 18 9. TYPICAL APPLICATION CIRCUITS ........................................................................................ 19 9.1 Expanded External Program Memory and Crystal ....................................................... 19 9.2 Expanded External Data Memory and Oscillator ......................................................... 20 10. PACKAGE DIMENSIONS ......................................................................................................... 21 10.1 40-pin DIP ..................................................................................................................... 21 10.2 44-pin PLCC ................................................................................................................. 21 10.3 44-pin PQFP ................................................................................................................. 22 11. REVISION HISTORY ................................................................................................................ 23 W78E51C/W78E051C Data Sheet 8-BIT MICROCONTROLLER Publication Release Date: November 10, 2006 - 1 - Revision A4 ...
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... The W78E051C is an 8-bit microcontroller which can accommodate a wider frequency range with low power consumption. The instruction set for the W78E051C is fully compatible with the standard 8051. The W78E051C contains an 4K bytes Flash EPROM; a 128 bytes RAM; four 8-bit bi-directional and bit-addressable I/O ports; an additional 4-bit I/O port P4; two 16-bit timer/counters; a hardware watchdog timer and a serial port ...
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... PIN CONFIGURATIONS W78E51C/W78E051C Publication Release Date: November 10, 2006 - 3 - Revision A4 ...
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... INT1 (P3.3) : External Interrupt 1 T0(P3.4) : Timer 0 External Input T1(P3.5) : Timer 1 External Input WR (P3.6) : External Data Memory Write Strobe RD (P3.7) : External Data Memory Read Strobe PORT 4: Another bit-addressable bidirectional I/O port P4. P4.3 and P4.2 are alternative function pins. It can be used as general I/O port or external interrupt input sources P4.0−P4.3 ( INT2 / INT3 ). W78E51C/W78E051C DESCRIPTIONS - 4 - ...
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... FUNCTIONAL DESCRIPTION The W78E051C architecture consists of a core controller surrounded by various registers, five general purpose I/O ports, 128 bytes of RAM, two timer/counters, and a serial port. The processor supports 111 different opcodes and references both a 64K program address space and a 64K data storage space ...
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... ROM code space. The AO bit in the AUXR register, when set, disables the ALE output. In order to reduce EMI emission from oscillation circuitry, W78E051C allows user to diminish the gain of on-chip oscillator amplifiers by using programmer to clear the B7 bit of security register. Once B7 is set half of gain will be decreased ...
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... After 1 is written to this bit, the 14-bit timer, prescaler and this bit will be reset on the next instruction cycle. The Watchdog timer is cleared on reset CLRW WIDL - Address: 8FH PRESCALER SELECT × Publication Release Date: November 10, 2006 - 7 - W78E51C/W78E051C PS2 PS1 PS0 ...
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... Clock The W78E051C is designed to be used with either a crystal oscillator or an external clock. Internally, the clock is divided by two before it is used. This makes the W78E051C relatively insensitive to duty cycle variations in the clock. The W78E051C incorporates a built-in crystal oscillator. To make the oscillator work, a crystal must be connected across pins XTAL1 and XTAL2. In addition, a load capacitor must be connected from each pin to ground ...
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... The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two machine cycles while the oscillator is running. An internal trigger circuit in the reset line is used to deglitch the reset line when the W78E051C is used with an external RC network. The reset logic also has a special glitch removal circuit that ignores glitches on the reset line. ...
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... Default 1 for all security bits. 6.1 Lock Bit This bit is used to protect the customer's program code in the W78E051C. It may be set after the programmer finishes the programming and verifies sequence. Once this bit is set to logic 0, both the on-chip ROM data and Special Setting Registers can not be accessed again. ...
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... MOVC instruction. 6.3 Encryption This bit is used to enable/disable the encryption logic for code protection. Once encryption feature is enabled, the data presented on port 0 will be encoded via encryption logic. Only whole chip erase will reset this bit. W78E51C/W78E051C Publication Release Date: November 10, 2006 - 11 - Revision A4 ...
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... Input Current P1, P2, P3, P4 Logical 1-to-0 Transition (*1) Current P1, P2 Input Current RST (*2) Input Leakage Current P0, EA Output Low Voltage P1, P2, P3, P4 Output Low Voltage ALE, PSEN , P0 (*3) Output High Voltage P1, P2, P3, P4 W78E51C/W78E051C SYMBOL MIN. − ...
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... Pins P1, P2 and P3 source a transition current when they are being externally driven from The transition current reaches its maximum value when V *2. RST pin has an internal pull-down resistor. *3. P0, ALE, PSEN are in the external access memory mode. *4. XTAL1 is a CMOS input and RST is a Schmitt trigger input. W78E51C/W78E051C SYMBOL TEST CONDITIONS V = 4.5V ...
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... PSEN Pulse Width Notes: 1. P0.0 − P0.7, P2.0 − P2.7 remain stable throughout entire memory cycle. 2. Memory access time Data have been latched internally prior to PSEN going high. 4. " Δ " (due to buffer driving delay and wire loading nS. W78E51C/W78E051C OP, ...
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... Port Input Setup to ALE Low Port Input Hold from ALE Low Port Output to ALE Note : Ports are read during S5P2, and output data becomes available at the end of S6P2. The timing data are referenced to ALE, since it provides a convenient reference. W78E51C/W78E051C SYMBOL MIN. TYP. T ...
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... Note: Flash data can be accessed only in flash mode. The RST pin must pull in V and the PSEN pin must pull in V SYMBOL T VPS PWP T OCS T OCH T OES T DFP T OEV status W78E51C/W78E051C MIN. TYP. MAX 290 300 310 2 2 ...
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... PSEN PORT 2 A0-A7 PORT ALW T APL T PSW T AAS T PDA T T PDH, PDZ A0-A7 A0-A7 Code A0-A7 Data A8-A15 DATA T T DAR DDA T DDH, T DRD Publication Release Date: November 10, 2006 - 17 - W78E51C/W78E051C Data A0- DDZ Revision A4 ...
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... Timing Waveforms, continued 8.3 Data Write Cycle S4 XTAL1 ALE PSEN PORT 2 PORT 0 A0-A7 WR 8.4 Port Access Cycle XTAL1 ALE T PDS PORT INPUT SAMPLE A8-A15 DATA OUT T DAD T T DWR DAW PDH - 18 - W78E51C/W78E051C DWD S1 T PDA DATA OUT ...
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... T1 1 P1.0 2 P1.1 3 P1.2 4 P1.3 5 P1.4 6 P1.5 7 P1.6 8 P1.7 W78E51C/W78E051C CRYSTAL 16 MHz 24 MHz 33 MHz 40 MHz Above table shows the reference values for crystal applications (full gain). Note: C1, C2, R components refer to Figure A. W78E51C/W78E051C AD0 39 AD0 P0.0 38 AD1 AD1 P0.1 37 AD2 AD2 ...
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... G INT0 23 P2.2 A10 P2.3 24 A11 INT1 P2.4 25 A12 T0 P2.5 26 A13 T1 P2.6 27 A14 28 P2.7 P1 P1.3 29 P1.4 PSEN 30 ALE P1.5 11 P1.6 TXD 10 RXD P1.7 Figure W78E51C/W78E051C ...
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... A 1 Seating Plane Publication Release Date: November 10, 2006 - 21 - W78E51C/W78E051C Dimension in inch Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.210 5.334 A 0.010 0.254 1 A 0.150 0.155 0.160 3.81 3.937 4.064 2 B 0.016 ...
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... Package Dimensions, continued 10.3 44-pin PQFP See Detail F Seating Plane θ Detail W78E51C/W78E051C Dimension in mm Dimension in inch Symbol Min. Nom. Max. Min. Nom. A --- --- --- --- --- A 0.002 0.01 0.02 0.05 0. 0.075 0.081 0.087 1.90 2. 0.01 0.014 0.25 0.018 ...
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... Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. W78E51C/W78E051C PAGE DESCRIPTION - Formerly issued ...