stm1404c STMicroelectronics, stm1404c Datasheet

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stm1404c

Manufacturer Part Number
stm1404c
Description
Security Supervisor With Battery Switchover
Manufacturer
STMicroelectronics
Datasheet

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Features
Table 1.
1. SAL, RST, PFO, and BLD are open drain.
2. Normal mode: low when V
3. Contact local ST sales office for availability.
4. Pin 9 is the V
February 2007
STM1404A
STM1404B
STM1404C
STM1404 supports FIPS-140 security level 4
– Four high-impedance physical tamper
– Over/Under operating voltage detector
– Security alarm (SAL) on tamper detection
– Over/Under operating temperature detector
– Over/Under temperature thresholds are
Supervisory functions
– Automatic battery switchover
– RST output (open drain)
– Manual (push-button) reset input (MR)
– Power-fail comparator (PFI/PFO)
Vccsw (V
– Low when switched to V
– High when switched to V
Battery low voltage detector (power-up)
inputs
customer-selectable and factory-
programmed
indicator)
(3)
CC
Device options
REF
Supervisory
functions
switch output)
pin for STM1404A. It is the V
OUT
(1)
is internally switched to V
Physical
tamper
inputs
CC
BAT
(BATT ON
Security supervisor with battery switchover
Over/under
TPU
voltage
alarms
pin for STM1404B/C.
CC
Rev 4
and high when V
temperature
Over/under
alarms
Optional V
– (Available for STM1404A only)
Low battery supply current (5.3µA Typ)
Secure low profile 16-pin, 3x3mm, QFN
package
RoHS compliance
– Lead-free components compliant with the
RoHS directive
OUT
(1.237V)
option
Note
Note
V
is internally switched to battery.
REF
REF
(4)
(4)
QFN16, 3x3mm (Q)
(1.237V)
V
OUT
Ground
during
High-Z
alarm
ON
status,
3V FIPS-140
STM1404
Vccsw status,
mode
Normal
during
alarm
High
High
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1

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stm1404c Summary of contents

Page 1

... STM1404A (3) ✔ STM1404B ✔ STM1404C 1. SAL, RST, PFO, and BLD are open drain. 2. Normal mode: low when V is internally switched to V OUT 3. Contact local ST sales office for availability. 4. Pin 9 is the V pin for STM1404A the V REF February 2007 Security supervisor with battery switchover ■ ...

Page 2

... Contents Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V pin modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 OUT STM1404A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 STM1404B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 STM1404C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 SAL, Security alarm output (open drain Vccsw BLD, V BAT Active-low RST output (open drain MR, Manual reset input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 PFO, Power-fail output (open drain PFI, Power-fail input ...

Page 3

Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

List of tables Table 1. Device options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 5

List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 6

... Voltage Out), when the SAL (Security Alarm) is asserted (active-low) upon tamper detection: STM1404A V stays ON (at V OUT STM1404B V is set to High-Z when SAL is driven low (activated). OUT STM1404C V is driven to Ground when SAL is activated (may be used when V OUT directly to the V CC All variants (see Table 1: Device friendly, low profile, 16-pin QFN package. 6/36 (1 ...

Page 7

Figure 1. Logic diagram 1. V only for STM1404A; V REF 2. Normal Mode: Low when V battery. 3. SAL, RST, PFO, and BLD are open drain. Table 2. Signal names (1) Vccsw MR PFI ...

Page 8

Figure 2. QFN16 connections Note: See Section : Pin descriptions on page 12 1. Normal mode: low when V battery. 2. SAL, RST, PFO, and BLD are open drain only for STM1404A; V REF Figure 3. Block diagram ...

Page 9

Figure 4. Hardware hookup Regulator Unregulated V IN Voltage R1 R2 Push-Button From Actuator Device (e.g., Switches, Wire Mesh) 1. Normal mode: low when V is internally switched to V OUT battery. 2. Capacitor (C) is typically ≥ 10µF. 3. ...

Page 10

Figure 5. Tamper Pin (TP closed typical is 10MΩ. Resistors must be protected against conductive materials. Figure 6. Tamper Pin (TP open typical is 10MΩ. Resistors must be protected against conductive materials. Figure 7. Tamper Pin ...

Page 11

Figure 8. Tamper Pin ( open) Switch Normally Open; Tamper Detection when Closed 1. R typical is 10MΩ. Resistors must be protected against conductive materials. ) Normally Low (NL) external hookup (switch 4 V OUT (STM1404A) or ...

Page 12

Pin descriptions See Figure 1: Logic diagram connected to this device. SAL, Security alarm output (open drain) This signal can be generated when ANY of the following conditions occur: ● V > where V INT ...

Page 13

... STM1404A (V operate in normal mode; 2. STM1404B (V High when this occurs; and 3. STM1404C (V High when this occurs. BLD, V low voltage detect output (open drain) BAT This is an internally loaded test of the battery, activated only during a power-up sequence to insure that the battery is good either prior to or after encapsulation of the module. There are three customer options for V ● ...

Page 14

... STM1404C: V High when this occurs. V TPU For STM1404B and STM1404C, this pin provides pull-up voltage for the physical tamper pins (TP1-4). This pin is not to be used as voltage supply source for any other purpose. Note the internally switched supply voltage from either the V ...

Page 15

Operation Reset input The STM1404 Security Supervisor asserts a reset signal to the MCU whenever V below the reset threshold (V RST is guaranteed logic low for 0V < back-up battery, RST is guaranteed valid ...

Page 16

Table 3. I/O status in battery back-up Pin V Connected to V OUT V Disconnected from V CC PFI Disabled PFO Logic low MR Disabled RST Logic low V Connected to V BAT Vccsw Logic high V Pulled to V ...

Page 17

... In addition to transients that are caused by normal SRAM operation, power cycling can generate negative voltage spikes on V one volt. These negative spikes can cause data corruption in the SRAM while in battery backup mode. To protect from these voltage spikes, STMicroelectronics recommends connecting a schottky diode from V Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount ...

Page 18

Tamper detection Physical There are four (4) high-impedance physical tamper detect input pins, 2 normally set to High (NH) and 2 normally set to Low (NL). Each input is designed with a glitch immunity (see Table 7 on page 30). ...

Page 19

Typical operating characteristics Note: Typical values are at T Figure 11. V BAT 220 200 180 160 140 120 100 –60 Figure 12. Supply current vs. temperature (no load –50 –40 = 25°C. ...

Page 20

Figure 13. V threshold vs. temperature PFI 1.255 1.250 1.245 1.240 1.235 1.230 1.225 Figure 14. Reset comparator propagation delay vs. temperature –60 Figure 15. Power-up t 215 24 22 210 20 ...

Page 21

Figure 17. PFI to PFO propagation delay vs. temperature –60 –40 –20 Figure 18. RST output voltage vs. supply voltage 3.5 3.0 2.5 2.0 V RST 1.5 1.0 0.5 0 ...

Page 22

Figure 20. Power-fail comparator response time (assertion) 4.0 3.0 2.0 1.0 0.0 Figure 21. Power-fail comparator response time (de-assertion) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 22/36 PFO PFI 2µs/div PFO PFI 2 µs/div 1.45 1.40 1.35 1.30 ...

Page 23

Figure 22 reset propagation delay vs. temperature –60 –40 –20 Figure 23. Maximum transient duration vs. reset threshold overdrive 250 200 150 100 RESET COMPARATOR OVERDRIVE, V ...

Page 24

... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. ...

Page 25

DC and AC parameters This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the Measurement Conditions ...

Page 26

Figure 26. STM1404 switchover diagram, condition 3. 2.4V Figure 27. STM1404 switchover diagram, condition 3. 2.4V Table 6. DC and AC characteristics Alter- Sym ...

Page 27

Table 6. DC and AC characteristics (continued) Alter- Sym Description native Internal switched V supply voltage (battery TPU2 back-up) Input leakage current (MR) Input leakage current I LI (PFI) Input leakage current (TP1-TP4) I Output leakage current LO V Input ...

Page 28

Table 6. DC and AC characteristics (continued) Alter- Sym Description native V battery back- OHB (Vccsw) Pull-up supply voltage (open drain) Power-fail comparator V PFI input threshold PFI PFI hysteresis PFI to PFO t PFD propagation delay Battery ...

Page 29

Table 6. DC and AC characteristics (continued) Alter- Sym Description native Reset thresholds (9) V Reset threshold RST t RST pulse width rec Push-button reset input pulse width MLMH RST output t t MLRL ...

Page 30

Table 7. Physical and environmental tamper detection levels Sym Parameter V Over voltage trip level HV V Under voltage trip level LV SAL propagation delay time (after over/under voltage detection) Trip point for NH physical tamper V HTP input pins ...

Page 31

Package mechanical data Figure 29. QFN16 – 16-lead, quad, flat package, no lead, 3x3mm body size, outline Note: Drawing is not to scale ddd ...

Page 32

Table 8. QFN16 – 16-lead, quad, flat package, no lead, 3x3mm body size mechanical data Symb Typ A 0.90 A1 0.02 A3 0.20 b 0.25 D 3.00 D2 1.70 E 3.00 E2 1.70 e 0.50 K 0.20 L 0.40 ddd ...

Page 33

Part numbering Table 9. Ordering information scheme (see Example: Device type STM1404: over/under temperature detect V status (SAL = active-low) OUT ON; Vccsw = normal mode OUT ( high-Z; Vccsw = high OUT ...

Page 34

Figure 31. Topside marking information 1. Options codes (for V OUT (for Reset Threshold (for Battery Low Voltage Detect Threshold ...

Page 35

Revision history Table 10. Document revision history Date Version 11-Oct-2004 1.0 26-Nov-2004 1.1 22-Dec-2004 1.2 03-Feb-2005 1.3 25-Feb-2005 1.4 06-May-2005 1.5 05-Aug-2005 2.0 06-Jan-2006 3.0 08-Feb-2007 4.0 Description First Edition Corrected footprint dimensions; update characteristics (Figure ...

Page 36

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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