ata5724p3c-tkqy ATMEL Corporation, ata5724p3c-tkqy Datasheet
ata5724p3c-tkqy
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ata5724p3c-tkqy Summary of contents
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Features • Frequency Receiving Range of (3 Versions) – 312.5MHz to 317.5MHz or 0 – 431.5MHz to 436.5MHz or 0 – 868MHz to 870MHz 0 • Image Rejection • Receiving Bandwidth – ...
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Description The Atmel an SSO20 package. It has been specially developed for the demands of RF low-cost data transmission systems with data rates from 1kBit/s to 10kBbit/s in Manchester or Bi-phase code. Its main applications are in the areas ...
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Figure 1-2. Block Diagram CDEM RSSI SENS AVCC AGND DGND DVCC LNAREF LNA_IN LNA LNAGND 9248A–RKE–09/11 Atmel ATA5723C/ATA5724C/ATA5728C FSK/ASK Dem_out Demodulator and Data Filter RSSI Limiter out RSSI IF Sensitivity Amp. reduction and Control Logic 4. Order ...
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Pin Configuration Figure 2-1. Pinning SSO20 Table 2-1. Pin Description Pin Symbol 1 SENS 2 IC_ACTIVE 3 CDEM 4 AVCC 5 TEST 1 6 RSSI 7 AGND 8 LNAREF 9 LNA_IN 10 LNAGND 11 TEST 2 12 TEST 3 ...
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RF Front-end The RF front-end of the receiver is a low-IF heterodyne configuration that converts the input signal into about 1MHz IF signal with a typical image rejection of 30dB. According to Figure Figure 1-2 on page 3 lator), ...
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To determine f quency is f tuned by the crystal frequency f and The relationship is designed to achieve the nominal IF frequency of 987kHz ...
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The output voltage of the RSSI amplifier (VRSSI) is available at pin RSSI. Using the RSSI out- put signal, the signal strength of different transmitters can be distinguished. The usable input power range P Figure 4-1. The output voltage of ...
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FSK/ASK Demodulator and Data Filter The signal coming from the RSSI amplifier is converted into the raw data signal by the ASK/FSK demodulator. The operating mode of the demodulator is set using the bit ASK/_FSK in the OPMODE register. ...
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Receiving Characteristics The Atmel a SAW front-end filter typical automotive application, a SAW filter is used to achieve bet- ter selectivity and large signal capability. The receiving frequency response without a SAW front-end filter is illustrated in ...
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Polling Circuit and Control Logic The receiver is designed to consume less than 1 mA while being sensitive to signals from a corresponding transmitter. This is achieved using the polling circuit. This circuit enables the signal path periodically for ...
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The clock cycle of some function blocks depends on the selected baud-rate range (BR_Range), which is defined in the OPMODE register. This clock cycle T following formulas: BR_Range = 8. Polling Mode According to three different modes. In sleep mode ...
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Figure 8-1. Polling Mode Flow Chart Sleep Mode: All circuits for signal processing are disabled. Only XTO and Polling logic are enabled. Output level on Pin IC_ACTIVE = > low Soff T = Sleep Sleep Start-up ...
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Bit-check Mode In bit-check mode the incoming data stream is examined to distinguish between a valid signal from a corresponding transmitter and signals due to noise. This is done by subsequent time frame checks where the distances between 2 ...
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For best noise immunity using a low span between T is achieved using a fixed frequency at a 50% duty cycle for the transmitter preburst. A “11111...” “10101...” sequence in Manchester or Bi-phase is suitable for this. A ...
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Figure 8-5. Timing Diagram for Failed Bit Check (Condition: CV_Lim < Lim_min) (Lim_min = 14, Lim_max = 24) IC_ACTIVE Bit check Dem_out Bit-check 0 counter T Start-up Start-up mode Figure 8-6. Timing Diagram for Failed Bit Check (Condition: CV_Lim (Lim_min ...
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Digital Signal Processing The data from the ASK/FSK demodulator (Dem_out) is digitally processed in different ways and as a result converted into the output signal data. This processing depends on the selected baud-rate range (BR_Range). extended clock cycle T ...
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Figure 8-9. Steady L State Limited DATA Output Pattern After Transmission IC_ACTIVE Bit check Dem_out Data_out (DATA) Start-up mode After the end of a data transmission, the receiver remains active. Depending of the bit Noise_Disable in the OPMODE register, the ...
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Figure 8-10. Timing Diagram of the OFF Command using Pin DATA IC_ACTIVE Out1 (microcontroller) Data_out (DATA) X Serial bi-directional X data line Receiving mode Figure 8-11. Timing Diagram of the OFF Command using Pin POLLING/_ON IC_ACTIVE POLLING/_ON Data_out (DATA) Serial ...
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Figure 8-11 to set the receiver back to polling mode using pin POLLING/_ON. The pin POLLING/_ON must be held to low for the time period t the delay t Using the POLLING/_ON command is faster than using pin DATA; however, ...
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Use the function of the data clock only in conjunction with the bit check recom- mended. If the bit check is set the receiver is set to receiving mode using the pin ...
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Figure 9-3. Data_out (DATA) DATA_CLK Figure 9-4. Data_out (DATA) DATA_CLK The delay of the data clock is calculated as follows Delay1 t Delay1 For the falling edge, t Figure 9-6 on page 22 level of Data_Out, the data ...
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Figure 9-5. Figure 9-6. Atmel ATA5723C/ATA5724C/ATA5728C 22 Timing Characteristic of the Data Clock (Rising Edge on Pin DATA) Data_Out 0. 0. Serial bi-directional S II data line Data_In DATA_CLK t ...
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Digital Noise Suppression After a data transmission, digital noise appears on the data output (see Digital Noise at the End of the Data Stream”). To prevent digital noise keeping the connected microcontroller busy, it can be suppressed in two ...
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Figure 10-3. Occurrence of a Pulse at the End of the Data Stream Data_out (DATA) DATA_CLK 10.2 Controlled Noise Suppression by the Microcontroller Digital noise appears at the end of a valid data stream if the bit Noise_Disable (see on ...
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Configuring the Receiver The Atmel registers called OPMODE and LIMIT. The registers can be programmed by means of the bidi- rectional DATA port. If the register content has changed due to a voltage drop, this condition is indicated by ...
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The following tables illustrate the effect of the individual configuration words. The default con- figuration is highlighted for each word. BR_Range sets the appropriate baud-rate range and simultaneously defines XLim. XLim is used to define the bit-check limits T and ...
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Table 11-7. Sleep4 ... 0 ... Table 11-8. Table 11-9. 9248A–RKE–09/11 Atmel ATA5723C/ATA5724C/ATA5728C Effect of the Configuration Word Sleep Sleep Sleep3 Sleep2 Sleep1 ...
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Table 11-10. Effect of the Configuration Word Lim_min (1) Lim_min (Lim_min < not Applicable) Lim_min5 Lim_min4 Lim_min3 ...
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Conservation of the Register Information The Atmel tion circuitry as a mechanism to preserve the RAM register information. According to below the threshold voltage V uration registers in that condition. The POR is cancelled after the minimum reset period ...
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Programming the Configuration Register Figure 13-1. Timing of the Register Programming IC_ACTIVE Out1 (microcontroller) Data_out (DATA) X Serial bi-directional X data line Receiving mode Figure 13-2. Data Interface V = 4.5V to 5.5V S 0V/5V Input Interface Data_in Data_out ...
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Bit 15 is followed by the equivalent time window t9. During this window, the equivalence acknowledge pulse t8 (E_Ack) occurs if the just programmed mode word is equivalent to the mode word that was already stored in that register. E_Ack ...
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Data Interface The data interface (see can be connected using the pull-up resistor R The applicable pull-up resistor R selected BR_range (see Table 14-1. C Figure 14-1. Application Circuit 4.7µF 10% GND C14 39nF 5% ...
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Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated ...
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Electrical Characteristics Atmel ATA5723C All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C). S amb Test No. Parameter Conditions Symbol 1 Basic Clock Cycle of the Digital ...
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Electrical Characteristics Atmel ATA5723C (Continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C). S amb Test No. Parameter Conditions Symbol Minimum time period between BR_Range = ...
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Electrical Characteristics Atmel ATA5723C (Continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C). S amb Test No. Parameter Conditions Symbol 4 Configuration of the Receiver (see ...
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Electrical Characteristics Atmel ATA5724C, ATA5728C All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C). S amb Test No. Parameter Conditions Symbol 6 Basic Clock Cycle of the ...
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Electrical Characteristics Atmel ATA5724C, ATA5728C (Continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C). S amb Test No. Parameter Conditions Symbol Minimum time period between BR_Range ...
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Electrical Characteristics Atmel ATA5724C, ATA5728C (Continued) All parameters refer to GND –40°C to +105°C, V amb (For typical values 5V 25°C). S amb Test No. Parameter Conditions Symbol 9 Configuration of the Receiver ...
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Electrical Characteristics Atmel ATA5723C/24C/28C All parameters refer to GND –40°C to +105°C, V amb unless otherwise specified. (For typical values: V No. Parameters 11 Current Consumption 11.1 Current consumption 12 LNA, Mixer, Polyphase Low-pass and IF Amplifier ...
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Electrical Characteristics Atmel ATA5723C/24C/28C (Continued) All parameters refer to GND –40°C to +105°C, V amb unless otherwise specified. (For typical values: V No. Parameters Static capacitance at pin 13.6 XTAL1 to GND Static capacitance at pin 13.7 ...
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Electrical Characteristics Atmel ATA5723C/24C/28C (Continued) All parameters refer to GND –40°C to +105°C, V amb unless otherwise specified. (For typical values: V No. Parameters Input sensitivity FSK 300kHz IF filter 14.5 (Atmel ATA5723C/ATA5724C) Input sensitivity FSK 14.6 ...
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Electrical Characteristics Atmel ATA5723C/24C/28C (Continued) All parameters refer to GND –40°C to +105°C, V amb unless otherwise specified. (For typical values: V No. Parameters Sensitivity variation FSK for the full operating range 14.8 including IF filter compared ...
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Electrical Characteristics Atmel ATA5723C/24C/28C (Continued) All parameters refer to GND –40°C to +105°C, V amb unless otherwise specified. (For typical values: V No. Parameters 14.18 Reduced sensitivity Reduced sensitivity variation 14.19 over full operating range Reduced sensitivity ...
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... Ordering Information Extended Type Number ATA5723P3C-TKQY ATA5724P3C-TKQY ATA5728P6C-TKQY 21. Package Information 0.25 ±0. Drawing-No.: 6.543-5056.01-4 Issue: 1; 10.03.04 9248A–RKE–09/11 Atmel ATA5723C/ATA5724C/ATA5728C Package Remarks SSO20 315MHz version SSO20 433MHz version SSO20 868MHz version 6.75 -0.25 0.65 ±0.05 5.85 ±0. Availability Planned in 2012 Available Planned in 2012 5.4 ±0.2 4.4 ± ...
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