ak5367 AKM Semiconductor, Inc., ak5367 Datasheet
ak5367
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ak5367 Summary of contents
Page 1
... AK5367 is a high-performance 24-bit, 96kHz sampling ADC for consumer audio and digital recording applications. The AK5367 uses an Enhanced Dual-Bit modulator architecture, this analog-to-digital converter has an impressive dynamic range of 102dB with a high level of integration. The AK5367 has a 4-channel stereo input selector, an input Programmable Gain Amplifier with resistance. All this integration with high-performance makes the AK5367 well suited for CD and DVD recording systems ...
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... RIN3 2Vrms 47K RIN4 ROPIN ROUT 24K MS0694-E- LISEL PDN AVDD HPF ADC ADC Audio 0V I/F 1Vrms ADC HPF Charge Pump RISEL CP CN CVEE + 10 0.1 1 Figure 1. AK5367 Block Diagram - 2 - [AK5367] VSS1 DVDD VCOM LRCK BICK SDTO MCLK SCL SDA VSS2 CVDD 2007/12 ...
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... RIN1 3 LIN2 4 RIN2 5 LIN3 6 RIN3 7 LIN4 8 RIN4 9 RISEL 10 ROUT 11 ROPIN 12 LOPIN 13 LOUT 14 LISEL 15 MS0694-E-00 20 +85 C 30pin VSOP (0.65mm pitch) Evaluation Board for AK5367 AK5367EF Top View - 3 - [AK5367] 30 AVDD 29 VSS1 28 DVDD 27 LRCK 26 MCLK 25 BICK 24 SDTO SCL 23 SDA 22 PDN CVDD 18 VSS2 ...
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... CP pin. Non polarity capacitors can also be used. Power Down Mode & Reset Pin 21 PDN I “H”: Power up, “L”: Power down & Reset The AK5367 must be reset once upon power-up. SDA I/O Control Data Input / Output Pin SCL I ...
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... Note: All input pins except analog input pins (RISEL, LISEL, LIN1-4, RIN1-4) should not be left floating. L Handling of Unused Pin The unused input pins should be processed appropriately as below. Classification Pin Name LIN1-4,RIN1-4,LISEL,RISEL Analog LOPIN,LOUT,ROPIN,ROUT MS0694-E-00 Function 5.5V Setting These pins should be open [AK5367] 2007/12 ...
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... In slave mode, the AK5367 must be power up at the PDN pin = “L”. In master mode, the AK5367 must be power up at the PDN pin = “L”, or when DVDD is powered up, MCLK clock must input and the AK5367 must be reset by the PDN pin=“L”. The internal register data is unknown until PDN pin=“ ...
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... L include the feedback resistor (Rf) and the input impedance of the LISEL/RISEL pins. The value of C include the internal impedance of the AK5367. Note 7. This value is measured via the following path. Pre-Amp Note 8. Input voltage to LISEL and RISEL pins is proportional to AVDD voltage. typ. Vin = 0.6 x AVDD (Vpp) Note 9 ...
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... MS0694-E- C1=10 F LISEL LOPIN LOUT R i LIN1 R i LIN2 - ADC + R i LIN3 LIN4 AK5367 Figure 2. Pre-Amp Circuit - 8 - [AK5367] L 2007/12 ...
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... 13 3.6V) Symbol min 13 CHARACTERISTICS 3.6V) Symbol min VIH 70%DVDD VIL - VOH DVDD 0.5 VOL - VOL - Iin - - 9 - [AK5367] typ max Units 18.9 kHz 20.0 - kHz 23.0 - kHz kHz 0. 1/fs 1.0 Hz 6.5 Hz typ max Units 37.8 kHz 40.0 - kHz 46.0 - kHz kHz 0. ...
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... [AK5367] typ max Units 24.576 MHz ns ns 36.864 MHz kHz 64fs 400 kHz ...
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... PDN Pulse Width PDN “ ” to SDTO valid at Slave Mode PDN “ ” to SDTO valid at Master Mode Note 16. The AK5367 can be reset by bringing the PDN pin = “L”. Note 17. This cycle is the number of LRCK rising edges from the PDN pin = “H”. MS0694-E-00 ...
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... Timing Diagram MCLK tCLKH LRCK BICK tSCKH LRCK tSHLR BICK tLRS SDTO Figure 4. Audio Interface Timing (Slave mode) MS0694-E-00 1/fCLK tCLKL 1/fs tSCK tSCKL Figure 3. Clock Timing tLRSH tSSD - 12 - [AK5367] VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL 50%DVDD 2007/12 ...
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... Start 2 Figure Bus mode Timing tPDV tPD Figure 7. Power Down & Reset Timing - 13 - [AK5367] 50%DVDD 50%DVDD 50%DVDD VIH VIL tSP VIH VIL tSU:STO Stop VIH VIL ...
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... In slave mode, all external clocks (MCLK, BICK and LRCK) must be present unless PDN pin = “L”. If these clocks are not provided, the AK5367 may draw excess current due to its use of internal dynamically refreshed logic. If the external clocks are not present, place the AK5367 in power-down mode (PDN pin = “L”). In master mode, the master clock (MCLK) must be provided unless PDN pin = “ ...
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... L Master Mode and Slave Mode The AK5367 becomes slave mode when the power-down mode (PDN pin = “L”) or exiting power-down. After exiting the power-down mode, master mode should be set by CKS0-2 bits. In master mode, LRCK and BICK pins are floating until CKS0-2 bits fixed. Therefore BICK and LRCK pins must be connected with 100 k pull-up or pull-down resistance ...
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... L Power-down The AK5367 is placed in the power-down mode by bringing PDN pin = “L” and the digital filter is also reset at the same time. This reset should always be done after power-up. At the power-down mode, the VCOM voltage is become VSS1. After exiting the power-down mode, the Charge pump circuit is powered up, and then Pre-Amp circuit is auto powered up ...
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... L System Reset The AK5367 should be reset once by bringing PDN pin “L” after power-up. At the slave mode, the internal timing starts clocking by the rising edge (falling edge at Mode 1) of LRCK after exiting from reset and power down state by MCLK. The AK5367 is in power-down states until the LRCK is input. At the master mode, bringing PDN pin “H” and exiting from reset and power down state by MCLK input ...
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... The output signal is attenuated by (2) When changing channels, the input channel should be changed during (2). The period of (2) should be around 200ms because there is some DC difference between the channels. MS0694-E-00 (1) (2) LIN 1 within 1024 LRCK cycles (1024/fs [AK5367] (Figure 12). (1) LIN 2 2007/12 ...
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... The input voltage range of the LISEL/RISEL pin is Table 5 C1=10 F Rf LOPIN LOUT LISEL Pre-Amp Pre-Amp ROPIN ROUT RISEL Rf C1=10 F Figure 13. Pre-Amp and Input ATT ATT Gain [dB] 12 11. Table 5. Input ATT example - 19 - [AK5367] shows the example of Ri and Rf. ADC ADC LISEL/RISEL pin 1.02Vrms 1.02Vrms 1Vrms 2007/12 ...
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... L Charge Pump Circuit The internal charge pump circuit generates negative voltage(CVEE) from CVDD voltage. The generated voltage is used for Pre-Amp. CVDD MS0694-E-00 AK5367 To Pre-Amp Charge Negative Voltage Pump CVEE CP VSS2 CN Cp=0.1 F Cout=1 F Figure 14. Charge Pump Circuit - 20 - [AK5367] 2007/12 ...
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... HIGH defines a STOP condition (Figure The AK5367 can perform more than one byte write operation per sequence. The master can transmit more than one byte instead of terminating the write cycle after the first data byte is transferred. After receiving each data packet the internal 2-bit address counter is incremented by one, and the next data is automatically taken into the next address. If the address exceeds 02H prior to generating the stop condition, the address counter will “ ...
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... READ Operations Set the R/W bit = “1” for the READ operation of the AK5367. After transmission of data, the master can read the next address’s data by generating an acknowledge instead of terminating the write cycle after the receipt of the first data word. After receiving each data packet the internal 2-bit address counter is incremented by one, and the next data is automatically taken into the next address. If the address exceeds 02H prior to generating a stop condition, the address counter will “ ...
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... MASTER S START CONDITION SDA SCL MS0694-E-00 Figure 21. START and STOP Conditions Figure 22. Acknowledge on the I C-Bus data line change stable; of data data valid allowed 2 Figure 23. Bit Transfer on the I C-Bus - 23 - [AK5367] P stop condition not acknowledge acknowledge 8 9 clock pulse for acknowledgement 2007/12 ...
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... DIF R [AK5367 PWN 0 SEL2 SEL1 SEL0 CKS2 CKS1 CKS0 SMUTE PWN R SEL2 ...
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... LOPIN CVDD 18 LOUT 14 VSS2 17 + LISEL 15 CVEE 16 Figure 24. Typical Connection Diagram - 25 - [AK5367 Analog 10u Digital 3.3V + 10u ...
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... ADC input is “C”, the cut-off frequency 1/(2 RC). The ADC output data format is 2’s compliment. The internal HPF removes the DC offset. The AK5367 samples the analog inputs at 64fs. The digital filter rejects noise above the stop band except for multiples of 64fs. The AK5367 includes an anti-aliasing filter (RC filter) to attenuate a noise around 64fs. ...
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... VSOP (Unit: mm) *9.7 0.1 0 0.22 0.1 0.12 M NOTE: Dimension "*" does not include mold flash. L Material & Lead finish Package molding compound: Lead frame material: Lead frame surface treatment: MS0694-E-00 PACKAGE 16 15 0.65 Detail A 0.08 Epoxy Cu Solder (Pb free) plate - 27 - [AK5367] 1.5MAX A +0.10 0.15 -0.05 2007/12 ...
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... MS0694-E-00 MARKING AKM AK5367EF XXXBYYYYC XXXBYYYYC Date code identifier REVISION HISTORY Page Contents MPORTANT NOTICE , and AKEMD assumes no responsibility for such use, except for the use Note2 [AK5367] in any safety, life support, or Note1) 2007/12 ...