78m6618-imr/f/p Maxim Integrated Products, Inc., 78m6618-imr/f/p Datasheet

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78m6618-imr/f/p

Manufacturer Part Number
78m6618-imr/f/p
Description
Octal Power And Energy Measurement Ic
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
Simplifying System Integration
DS_6618_005
DESCRIPTION
The Teridian 78M6618 is a highly integrated IC for
independent monitoring and measurement of up to eight (8)
single-phase AC outlets. With multiple host interface options,
an integrated LCD driver, and configurable I/Os, it is ideal for
metered power distribution units (PDUs) and rack enclosures
for the data center as well as intelligent power strips and sub
panels in the grid-friendly digital home.
At the measurement interface, the device provides ten analog
inputs for interfacing to voltage and current sensors. Scaled
voltages from the sensors are fed to Teridian’s patented Single
Converter Technology
independent 32-bit compute engine (CE), digital temperature
compensation, and precision voltage references to provide
better than 0.5% accuracy over a wide 2000:1 dynamic range.
The integrated MPU core and 128 KB of Flash memory
provides a flexible means of configuration, post-processing,
data formatting, interfacing to host processor via a UART or
SPI interface, displaying output data to an LCD, or using DIO
pins for intelligent relay control. Complete firmware for
common applications is available from Teridian and can be
pre-loaded into the IC during manufacturing test. Alternatively,
a complete array of ICE, development tools and programming
libraries are available to allow customization MPU code for
each application.
Rev. 1.3
NEUTRAL
LIVE
RELAY DRIVERS,
7-SEG LCD, etc.
CT-1
CT-2
CT-3
CT-4
CT-5
CT-6
CT-7
CT-8
(optional)
POWER FAULT
DC
NEUTRAL
®
OUTLET4
OUTLET1
OUTLET2
OUTLET3
OUTLET5
OUTLET6
OUTLET7
OUTLET8
LIVE
which uses a 21-bit delta-sigma ADC,
IA
IB
IC
ID
IE
IG
IH
VA
COMPARATOR
IF
VB
V1
CONVERTER
SEG [1:35]
DIO [1:19]
VREF
T
78M6618
COMPUTE
ERIDIAN
SENSOR
ENGINE
80515
FLASH
© 2010 Teridian Semiconductor Corporation
V3.3A V3.3D
MPU
TEMP
RAM
ICE
POWER SUPPLY
+
AC to DC
TM
GNDA GNDD
REGULATOR
OSC/PLL
TIMERS
UARTs
-
OPT_TX
OPT_RX
RTC
SPI
I2C
VBAT
XOUT
V2.5
XIN
TX
RX
additional 6618s
additional 6618s
32 kHz
BATTERY
(optional)
EEPROM
(optional)
Host uC,
Host uC,
FEATURES
• < 0.5% Wh accuracy over wide 2000:1 current
• Exceeds IEC 62053 / ANSI C12.20 standards
• Voltage reference < 40 ppm/°C
• Ten sensor inputs—V3P3 referenced
• 21-bit delta-sigma ADC with independent 32-bit
• 8-bit MPU (80515), 1 clock cycle per instruction
• 128 KB Flash with security
• Integrated ICE for MPU debug
• 32 kHz time base with hardware watchdog
• UART and
• LCD driver (up to 70 pixels)
• Packaged in a RoHS compliant (6/6) lead-free
• Complete Application Firmware provides:
range and over temperature
Up to 19 general purpose 5 V tolerant I/O pins
68-pin QFN
o
o
o
o
o
o
o
compute engine (CE)
with 4 KB MPU XRAM
timer
options
True RMS calculations for current, voltage,
line frequency, real power, reactive power,
apparent power, and power factor
Accumulated watt-hours, kilowatt-hours,
and cost
Intelligent switch control at zero crossings
Digital temperature compensation
Phase compensation (±15°)
Quick calibration routines
46-64 Hz line frequency range with same
calibration
Energy Measurement IC
high-speed slave SPI host interface
DATA SHEET
Octal Power and
78M6618
June 2010
1

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78m6618-imr/f/p Summary of contents

Page 1

... Simplifying System Integration DS_6618_005 DESCRIPTION The Teridian 78M6618 is a highly integrated IC for independent monitoring and measurement eight (8) single-phase AC outlets. With multiple host interface options, an integrated LCD driver, and configurable I/Os ideal for metered power distribution units (PDUs) and rack enclosures for the data center as well as intelligent power strips and sub panels in the grid-friendly digital home ...

Page 2

... Data Sheet 1 Hardware Functional Description ................................................................................................. 5 1.1 Hardware Overview................................................................................................................. 5 1.2 Device Reset .......................................................................................................................... 7 1.3 Power Management ................................................................................................................ 7 1.3.1 Voltage Regulator ........................................................................................................ 7 1.3.2 Power Fault Management ............................................................................................ 7 1.3.3 BROWNOUT ............................................................................................................... 7 1.3.4 SLEEP mode............................................................................................................... 7 1.4 Analog Front End (AFE) .......................................................................................................... 7 1.4.1 Analog Current and Voltage Inputs .............................................................................. 8 1.5 Digital Computation Engine (CE) ............................................................................................. 8 1.6 80515 MPU Core .................................................................................................................... 9 1.6.1 SFR ............................................................................................................................ 9 1.7 XRAM ..................................................................................................................................... 9 1.8 IORAM .................................................................................................................................... 9 1.9 FLASH .................................................................................................................................... 9 1.9.1 Program Security......................................................................................................... 9 1 ...

Page 3

... QFN Package Outline ..................................................................................... 25 3.1.3 Recommended PCB Land Pattern for the QFN-68 Package ...................................... 26 4 Pin Descriptions .......................................................................................................................... 27 4.1 Power and Ground Pins ........................................................................................................ 27 4.2 Analog Pins........................................................................................................................... 27 4.3 Digital Pins ............................................................................................................................ 28 5 I/O Equivalent Circuits ................................................................................................................. 29 6 Ordering Information ................................................................................................................... 30 7 Contact Information ..................................................................................................................... 30 8 Appendix A: Acronyms ............................................................................................................... 31 9 Revision History .......................................................................................................................... 32 Rev. 1.3 78M6618 Data Sheet 3 ...

Page 4

... Data Sheet Figures Figure 1: 78M6618 IC Functional Block Diagram ..................................................................................... 6 Figure 2: AFE Block Diagram................................................................................................................... 8 Figure 3: SPI Slave Port: Typical Read and Write Operations ................................................................ 12 Figure 4: SPI Slave Port (MISSION Mode) Timing ................................................................................. 23 Figure 5: Pinout for QFN-68 Package .................................................................................................... 24 Figure 6: QFN-68 Package Outline (Top, Bottom, and Side View) .......................................................... 25 Figure 7: PCB Land Pattern for QFN 68 Package ...

Page 5

... Various current sensor technologies are supported including Current Transformers (CT), Resistive Shunts and Rogowski coils typical application, the 32-bit compute engine (CE) of the 78M6618 sequentially process the samples from the analog inputs on pins IA, IB, IC, ID, IE, IF, IG, IH, VA, VB and performs calculations to measure ...

Page 6

... XIN OSC (32.768kHz) XOUT RTC TEST TEST MODE RX UART TX OPT_RX / DIO1 OPTICAL OPT_TX / DIO2 MOD FAULTZ V1 POWER FAULT Figure 1: 78M6618 IC Functional Block Diagram 6 VREF V3P3A ∆Σ ADC CONVERTER VBIAS FIR RTM RPULSE CE VREF WPULSE XPULSE YPULSE CE_PROG 32 16 CE_DATA MCK ...

Page 7

... Power Management 1.3.1 Voltage Regulator The 78M6618 provides an on chip voltage regulator to create a 2.5V supply for the digital logic. This regulator can be run off of the V3P3SYS or VBAT inputs depending upon power availability. 1.3.2 Power Fault Management The 78M6618 includes both hardware and software controlled power fault management connected to a comparator to monitor system power fault conditions. When the output of the comparator falls (V1< ...

Page 8

... Due to the custom nature and complexity of the CE, generally, pre-compiled CE code is provided by Teridian as a part of the available reference firmware and is not modified by the user. Please contact Teridian support for more information regarding CE code. See the 78M6618 Programmer’s Reference Manual for more information on interfacing to and configuration of the 78M6618 CE. 8 VREF ∆ ...

Page 9

... SFR settings. 1.9.1 Program Security The 78M6618 has functionality to guarantee the security of the user’s MPU and CE program code. When enabled, the security feature limits the ICE to global Flash erase operations only. All other ICE operations are blocked. Security is enabled by MPU code that is executed in a pre-boot interval before the primary boot sequence begins ...

Page 10

... Watchdog timer expired flag will be set. 4096 oscillator cycles (or 125 ms) after the WDT overflow, the MPU will be re-launched from program address 0x0000. The WDT can be disabled by tying the V1 pin to within 10mV of V3P3. See the 78M6618 Programmer’s Reference Manual for more information regarding the use of the 78M6618 Hardware Watchdog Timer. ...

Page 11

... DS_6618_005 1.16 LCD Drivers The 78M6618 contains a total of 35 dedicated and multiplexed LCD drivers which are grouped as follows: • 11 dedicated LCD segment drivers. • 3 drivers multiplexed with the ICE interface (E_TCLK, E_RST, E_RXTX). • 1 driver multiplexed with auxiliary signal CKTEST (SEG19). • ...

Page 12

... Figure 3: SPI Slave Port: Typical Read and Write Operations Since the addresses are in 16-bit format, any type of XRAM data can be accessed: CE, MPU or IORAM but not SFRs or the 80515-internal register bank. See the 78M6618 Programmer’s Reference Manual for more information regarding the mapping and use of SPI functions. ...

Page 13

... DS_6618_005 1.20 UARTs The 78M6618 includes two UARTs (UART0 and UART1) that can be programmed to communicate with a variety of external devices. The UARTs are dedicated 2-wire serial interfaces, which can communicate at rates up to 38,400 bits/s. All UART transfers are programmable for parity enable, parity, 2 stop bits/1 stop bit and XON/XOFF options for variable communication baud rates from 300 to 38,400 bps. See the 78M6618 Programmer’ ...

Page 14

... Data Sheet 2 Electrical Specifications 2.1 Absolute Maximum Ratings Table 2 shows the absolute maximum ranges for the device. Stresses beyond Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation at these or any other conditions beyond those indicated under recommended operating ...

Page 15

... Load capacitor for crystal (depends on crystal specs and board parasitics). Condition Normal Operation Battery Backup No Battery Battery Backup: BRN and LCD modes SLEEP mode 78M6618 Data Sheet Value Unit ≥0.1 ±20% µF 0.1 ±20% µF ≥1.0 ±30% µF 0.1 ±20% µ ...

Page 16

... Data Sheet 2.4 Performance Specifications 2.4.1 Input Logic Levels Parameter a Digital high-level input voltage , V a Digital low-level input voltage , V Input pull-up current E_RXTX, E_RST, CKTEST Other digital inputs Input pull down current ICE_E RESET Other digital inputs a In battery powered modes, digital inputs should be below 0 above 2 minimize battery current. ...

Page 17

... On resistance – VBAT to V3P3D Rev. 1.3 Condition FIR_LEN=0(L=138) FIR_LEN=1(L=288) FIR_LEN=0(L=186) FIR_LEN=1(L=384) Condition <25°C over temperature <25°C over temperature Condition | ≤ V3P3D | ≤ V3P3D 78M6618 Data Sheet Min Typ Max Unit kΩ µV (-10%) -48.7 (+10%) µV -5.35 µV (-10%) -19.8 (+10%) µ ...

Page 18

... Data Sheet 2.4.7 2.5 V Voltage Regulator Table 11: 2.5 V Voltage Regulator Performance Specifications Parameter V2P5 V2P5 load regulation Voltage overhead V3P3-V2P5 PSSR ∆V2P5/∆V3P3 2.4.8 Low-Power Voltage Regulator Unless otherwise specified, V3P3SYS = V3P3A = 0. Table 12: Low-Power Voltage Regulator Performance Specifications Parameter V2P5 V2P5 load regulation VBAT voltage requirement PSRR Δ ...

Page 19

... SOURCE SINK Condition ) + 25º (L=138) FIR_LEN=0 FIR_LEN=1 (L=288) FIR_LEN=0 (L=186) FIR_LEN=0 (L=138) FIR_LEN=1 (L=288) FIR_LEN=0 (L=186 25° -40ºC to +85ºC 78M6618 Data Sheet Min Typ Max Unit -0.1 +0 kΩ Min Typ Max Unit 0.4 V 0.7 V ...

Page 20

... Data Sheet 2.4.14 VREF Table 18 shows the performance specifications for VREF. Unless otherwise specified, VREF_DIS = 0. Table 18: VREF Performance Specifications Parameter VREF output voltage, VREF(22) VREF chop step VREF power supply sensitivity ΔVREF / ΔV3P3A VREF input impedance VREF output impedance a VNOM definition ...

Page 21

... Vin=65 Hz, 64 kpts FFT, Blackman- Harris window CKCE = 5 MHz Vin = Vin = 65 Hz FIR_LEN=0 FIR_LEN=1 FIR_LEN=0 FIR_LEN=0 FIR_LEN=1 FIR_LEN=0 Vin=200 mV pk V3P3A=3.0 V, 3.6 V -10 78M6618 Data Sheet Typ Max Unit mV 250 peak µV/V 10 -75 dB -90 dB kΩ 90 Ω/°C 1.7 ...

Page 22

... Data Sheet 2.5 Timing Specifications 2.5.1 Flash Memory Table 20: Flash Memory Timing Specifications Parameter Flash write cycles Flash data retention Flash data retention Flash byte write operations between page or mass erase operations Write Time per Byte Page Erase (1024 bytes) Mass Erase 2 ...

Page 23

... This spec defines a nominal relationship rather than a measured parameter. Correct circuit operation will be verified with other specs that use this nominal relationship as a reference. Rev. 1.3 Condition Ignore if PCLK is low when PCSZ falls. t SPIcyc t t SPIW SPIEV SPIW t SPIH 78M6618 Data Sheet Min Typ Max Unit ...

Page 24

... Data Sheet 3 Packaging 3.1 68-Pin QFN Package 3.1.1 Pinout E_RST/SEG11 1 E_TCLK/SEG10 2 GNDD 3 SEG9/E_RXTX 4 OPT_TX/DIO2 5 TMUXOUT SEG3/PCLK 8 V3P3D 9 SEG19/CKTEST 10 V3P3SYS 11 SEG4/PSDO 12 SEG5/PCSZ 13 SEG37/DIO17 14 SEG38/DIO18 15 DIO3 16 COM0 17 24 Teridian 78M6618-IM Figure 5: Pinout for QFN-68 Package DS_6618_005 51 V3P3A 50 GNDA 49 RESET 48 V2P5 47 VBAT SEG31/DIO11 ...

Page 25

... DS_6618_005 3.1.2 68-Pin QFN Package Outline 0.850 Figure 6: QFN-68 Package Outline (Top, Bottom, and Side View) NOTE: Controlling dimensions are in mm Pin length is nominally 0.4mm (min. 0.3 mm, max 0.4 mm). Rev. 1.3 78M6618 Data Sheet 25 ...

Page 26

... Data Sheet 3.1.3 Recommended PCB Land Pattern for the QFN-68 Package Figure 7: PCB Land Pattern for QFN 68 Package Table 25: Recommended PCB Land Pattern Dimensions Symbol Notes not place unmasked vias in the region denoted by dimension d. 2. Soldering of bottom internal pad is not required for proper operation. ...

Page 27

... XIN, and XOUT should be left unconnected. 1) Pin types Power Output Input, I/O = Input/Output The circuit number denotes the equivalent circuit, as specified under Rev. 1.3 Table 26: Power and Ground Pins Description Table 27: Analog Pins Description 78M6618 Data Sheet Section 5 I/O Equivalent Circuits. 27 ...

Page 28

... Data Sheet 4.3 Digital Pins Name Type Circuit COM1,COM0 O 5 DIO3 I/O 3,4 SEG0…SEG2 SEG7, SEG8 SEG12, SEG14…SEG18 SEG24/DIO4… I Multi-use pins, configurable as either LCD SEG driver or DIO. SEG31/DIO11, SEG33/DIO13… SEG39/DIO19, SEG63/DIO43 Multi-use pins, configurable as either LCD SEG driver or SPI PORT. ...

Page 29

... Pin Oscillator GNDD Oscillator Equivalent Circuit Type 8: Oscillator I/O 10 from V3P3SYS 40 from VBAT V3P3D Equivalent Circuit Type 13: V3P3D Figure 8: I/O Equivalent Circuits 78M6618 Data Sheet V3P3A from VREF internal Pin reference GNDA VREF Equivalent Circuit Type 9: VREF V3P3D from V2P5 internal Pin reference ...

Page 30

... USA Telephone: (714) 508-8800 FAX: (714) 508-8878 30 Table 29: Ordering Information Flash Packaging Size 128 KB Bulk 78M6618-IM/F 128 KB Bulk, 78M6618-IM/F/P Programmed 128 KB Tape and Reel 78M6618-IMR/F 128 KB Tape and Reel, 78M6618-IMR/F/P Programmed DS_6618_005 Package Order Number Marking 78M6618-IM 78M6618-IM 78M6618-IM 78M6618-IM Rev. 1.3 ...

Page 31

... American National Standards Institute CE Compute Engine DIO Digital I /O ICE In-Circuit Emulator IEC International Electrotechnical Commission MPU Microprocessor Unit (CPU) PLL Phase-Locked Loop RMS Root Mean Square SFR Special Function Register SOC System on Chip UART Universal Asynchronous Receiver/Transmitter Rev. 1.3 78M6618 Data Sheet 31 ...

Page 32

... Data Sheet 9 Revision History Revision Date 1.0 5/6/2009 First publication. 1.3 6/21/2010 Moved firmware specific information to respective developers manuals. Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation. Single Converter Technology is a registered trademark of Teridian Semiconductor Corporation. Simplifying System Integration is a trademark of Teridian Semiconductor Corporation. ...

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