spear-09-b042 STMicroelectronics, spear-09-b042 Datasheet

spear-09-b042

Manufacturer Part Number

spear-09-b042

Description

Spear?? Basic Arm 926ej-s Core, Customizable Logic, Large Ip Portfolio Soc

Manufacturer

STMicroelectronics

Datasheet

1.SPEAR-09-B042.pdf (66 pages)

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Features

■

May 2008

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to

change without notice.

ARM926EJ-S core @333 MHz

– 16 Kbyte instructions/data cache

Reconfigurable logic array:

– 300 Kgate (100% utilization rate)

– 102 I/O lines

– No clock domain limitation

– 64 Kbyte + 8 Kbyte configurable memory

Multilayer AMBA 2.0 compliant bus with f

166 MHz

32-Kbyte boot ROM

8 Kbyte common static RAM

– Shared with reconfigurable array

Dynamic power saving features

High performance DMA

– 8 channels

Ethernet 10/100 MAC with MII interface.

(IEEE-802.3)

USB 2.0 device with integrated PHY

2 USB 2.0 host with integrated PHY

External DRAM memory interface:

– 8/16-bit (LPDDR@166 MHz)

– 8/16-bit (DDR2@333 MHz)

– 2 banks available

Flash interface:

– SPI serial (up to 50 Mbps)

SPI master/slave up to 50 Mbps

– Compliant with Motorola, Texas

speed

UARTs (up to 460.8 Kbps)

IrDA (FIR/MIR/SIR) compliant serial link from

9.6 Kbps to 4 Mbps speed-rate

C master/slave mode – high, fast and slow

pool

instruments and National semiconductor

protocols

ARM 926EJ-S core, customizable logic, large IP portfolio SoC

MAX

Rev 1

■

Description

SPEAr BASIC is a powerful digital engine

belonging to SPEAr family, the innovative

customizable system-on-chip. The device

integrates an ARM 926 core with an extensive set

of proven IPs and a large configurable logic block

that allows very fast customization of unique

and/or proprietary solutions.

6 legacy GPIO bidirectional signals with

interrupt capability

ADC 10-bit, 1 Msps 8 inputs

– Hw supporting up to 13.5 bits at 8 KSPS by

JPEG codec accelerator (1 clock/pixel)

C3 crypto accelerator

3 pairs of 16-bit general purpose timers with

programmable prescaler

Real-time clock

Watchdog

System controller

Miscellaneous internal control registers

– SOC parameter configuration

JTAG (IEEE1149.1) interface

ETM9 interface

Operating temperature: - 40 to 85 °C

Low power consumption technology

oversampling and accumulation

SPEAR-09-B042

LFBGA289

SPEAr

Preliminary Data

BASIC

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