wm8940gefl-v Wolfson Microelectronics plc, wm8940gefl-v Datasheet - Page 30
wm8940gefl-v
Manufacturer Part Number
wm8940gefl-v
Description
Mono Codec With Speaker Driver
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8940GEFL-V.pdf
(87 pages)
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WM8940
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Figure 12 ALC Normal Mode Operation
Table 20 ALC Control Registers
NORMAL MODE
NOTE: The Input PGA Volume register R45 must be written with the INPPGAMUTE bit R45[6] set to
0 before setting ALCSEL bit R32[8] to 1.
When the ALC is disabled, the input PGA remains at the last controlled value of the ALC. An input
gain update must be made by writing to the INPPGAVOLL/R register bits.
In normal mode, the ALC will attempt to maintain a constant signal level by increasing or decreasing
the gain of the PGA. The following diagram shows an example of this.
R42 (2Ah)
ALC Control 4
REGISTER
ADDRESS
1
BIT
ALCZC
LABEL
0 (zero cross
off)
DEFAULT
1010 or
higher
ALC uses zero cross detection circuit.
0 = Disabled (recommended)
1 = Enabled
23.2ms
DESCRIPTION
PD, Rev 4.2, April 2008
186ms
Production Data
1.34s
30
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