wm8940gefl-v Wolfson Microelectronics plc, wm8940gefl-v Datasheet - Page 76

• Manufacturer Part Number: wm8940gefl-v
• Description: Mono Codec With Speaker Driver
• Manufacturer: Wolfson Microelectronics plc

WM8940
w
28 (1Ch)
29 (1Dh)
30 (1Eh)
31(1Fh)
32 (20h)
33 (21h)
34 (22h)
35 (23h)
36 (24h)
REGISTER
ADDRESS
15:0
15:0
15:0
15:0
15:10 ALCGAIN [5:0]
9
8
7:6
5:3
2:0
15:8
7:4
3:0
15:9
8
7:4
3:0
15:4
3
2:0
15:8
7
6
5:4
BIT
ALCSEL
ALCMAX
ALCMIN
ALCHLD
ALCLVL
ALCMODE
ALCDCY
ALCATK
NGEN
NGTH
PLL_POWERD
OWN
FRACEN
PLLPRESCALE 00
LABEL
0000h
0000h
000000
111
000
000
1011
0011
0010
0
000
0
1
0000h
0000h
0
0
00
000h
00h
0
000h
00h
DEFAULT
Reserved
Reserved
Reserved
Reserved
Readback from this register will return the ALC gain in
this position
Reserved
ALC function select
0=ALC disabled
1=ALC enabled
Reserved
Set Maximum Gain of PGA
Set minimum gain of PGA
Reserved
ALC hold time before gain is increased.
ALC threshold level. Sets the desired signal level.
Reserved
Determines the ALC mode of operation:
0=Normal mode
1=Limiter mode.
Decay (gain ramp-up) time
ALC attack (gain ramp-down) time
Reserved
Noise gate function enable
1 = enable
0 = disable
Noise gate threshold
Reserved
PLL POWER
0=On
1=Off
Fractional Divide within the PLL
0=Disabled (Lower Power)
1=Enabled
00 = MCLK input multiplied by 2 (default)
01 = MCLK input not divided (default)
10 = Divide MCLK by 2 before input to PLL
11 = Divide MCLK by 4 before input to PLL
DESCRIPTION
PD, Rev 4.2, April 2008
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Master Clock and
Phase Locked
Loop (PLL)
Master Clock and
Phase Locked
Loop (PLL)
Master Clock and
Phase Locked
Loop (PLL)
REFER TO
Production Data
76