74AHC1G86GV,125 NXP Semiconductors, 74AHC1G86GV,125 Datasheet
74AHC1G86GV,125
Specifications of 74AHC1G86GV,125
74AHC1G86GV
74AHC1G86GV,125
74AHC1G86GV
935271673125
Related parts for 74AHC1G86GV,125
74AHC1G86GV,125 Summary of contents
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EXCLUSIVE-OR gate Rev. 05 — 4 July 2007 1. General description 74AHC1G86 and 74AHCT1G86 are high-speed Si-gate CMOS devices. They provide a 2-input EXCLUSIVE-OR function. The AHC device has CMOS input switching levels and supply voltage range ...
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... NXP Semiconductors 4. Marking Table 2. Marking codes Type number 74AHC1G86GW 74AHCT1G86GW 74AHC1G86GV 74AHCT1G86GV 5. Functional diagram Fig 1. Logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning Fig 4. Pin configuration 74AHC_AHCT1G86_5 Product data sheet 74AHC1G86; 74AHCT1G86 Marking code AH CH A86 C86 Y 4 mna038 Fig 2 ...
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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin GND Functional description Table 4. Function table H = HIGH voltage level LOW voltage level Inputs Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V) ...
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... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions For type 74AHCT1G86 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage 8 LOW-level output voltage 8 input leakage GND current 5 supply current 5 additional per input pin; V ...
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... NXP Semiconductors Table 8. Dynamic characteristics GND = 3.0 ns. For waveform see r f Symbol Parameter Conditions For type 74AHCT1G86 t propagation A and delay power per buffer; PD dissipation pF MHz; L capacitance V = GND [ the same as t and PLH PHL [2] Typical values are measured at V [3] Typical values are measured at V ...
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... NXP Semiconductors Test data is given in Table 8. Definitions for test circuit load capacitance including jig and probe capacitance termination resistance should be equal to the output impedance Z T Fig 6. Load circuitry for switching times 74AHC_AHCT1G86_5 Product data sheet 74AHC1G86; 74AHCT1G86 PULSE DUT GENERATOR the pulse generator ...
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... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 7 ...
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... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions) UNIT 0.100 1.1 0.40 0.26 mm 0.013 0.9 0.25 0.10 OUTLINE VERSION IEC SOT753 Fig 8. Package outline SOT753 (SC-74A) 74AHC_AHCT1G86_5 Product data sheet 74AHC1G86; 74AHCT1G86 scale 3.1 1.7 3.0 0.6 0.95 2 ...
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... Release date 74AHC_AHCT1G86_5 20070704 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Package SOT353 changed to SOT353-1 in • ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 14 Abbreviations ...