vp0109 Supertex, Inc., vp0109 Datasheet

vp0109

Manufacturer Part Number

vp0109

Description

P-channel Enhancement-mode Vertical Dmos Fets

Manufacturer

Supertex, Inc.

Datasheet

1.VP0109.pdf (5 pages)

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Features

►

Applications

►

-G indicates package is RoHS compliant (‘Green’)

* MIL visual screening available.

Absolute Maximum Ratings

Absolute Maximum Ratings are those values beyond which damage to

the device may occur. Functional operation under these conditions is not

implied. Continuous operation of the device at the absolute rating level

may affect device reliability. All voltages are referenced to device ground.

* Distance of 1.6mm from case for 10 seconds.

Ordering Information

Parameter

Drain-to-source voltage

Drain-to-gate voltage

Gate-to-source voltage

Operating and storage temperature

Soldering temperature*

Free from secondary breakdown

Low power drive requirement

Ease of paralleling

Low C

High input impedance and high gain

Excellent thermal stability

Integral source-to-drain diode

High input impedance and high gain

Complementary N- and P-channel devices

Motor controls

Converters

Ampliﬁ ers

Switches

Power supply circuits

Drivers (relays, hammers, solenoids, lamps,

memories, displays, bipolar transistors, etc.)

VP0109

Device

ISS

and fast switching speeds

VP0109N3-G

TO-92

Package Options

P-Channel Enhancement-Mode

Vertical DMOS FETs

-55°C to +150°C

VP0109ND

Die*

+300°C

Value

±20V

DGS

DSS

General Description

The Supertex VP0109 is an enhancement-mode (normally-

off) transistor that utilizes a vertical DMOS structure

and Supertex’s well-proven silicon-gate manufacturing

process. This combination produces a device with the

power handling capabilities of bipolar transistors, and the

high input impedance and positive temperature coefﬁ cient

inherent in MOS devices. Characteristic of all MOS

structures, this device is free from thermal runaway and

thermally-induced secondary breakdown.

Supertex’s vertical DMOS FETs are ideally suited to a

wide range of switching and amplifying applications where

very low threshold voltage, high breakdown voltage, high

input impedance, low input capacitance, and fast switching

speeds are desired.

Pin Conﬁ guration

Product Marking

DSS

-90

(V)

/BV

Y Y W W

DGS

0109

YY = Year Sealed

WW = Week Sealed

DRAIN

TO-92 (N3)

(max)

SOURCE

DS(ON)

8.0

(Ω)

= “Green” Packaging

GATE

VP0109

(min)

-500

(mA)

D(ON)

Related parts for vp0109

vp0109 Summary of contents

Page 1

... Distance of 1.6mm from case for 10 seconds. P-Channel Enhancement-Mode Vertical DMOS FETs General Description The Supertex VP0109 is an enhancement-mode (normally- off) transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coefﬁ ...

Page 2

... -10V -500mA mmho V = -25V -500mA 0V -25V 1.0MHz 8.0 6 -25V -500mA 25Ω GEN -1. 0V -1. GEN D.U.T. Output INPUT VP0109 I DRM (mA) -800 = -25V = -25V ...

Page 3

... Typical Performance Curves 3 VP0109 ...

Page 4

... Typical Performance Curves (cont.) 4 VP0109 ...

Page 5

... Dimension NOM - (inches) MAX .210 Drawings not to scale. (The package drawing (s) in this data sheet may not reﬂ ect the most current speciﬁ cations. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-VP0109 A020408 ...

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