pex-8311 PLX, pex-8311 Datasheet

pex-8311

Manufacturer Part Number

pex-8311

Description

X1 Lane Pci Express Bridge, 21 X 21mm Pbga

Manufacturer

PLX

Datasheet

1.PEX-8311.pdf (4 pages)

Current page: 1 of 4
Download datasheet (3Mb)

Features

PEX 8311 Key Features

o PCI Express to Generic Local Bus Bridge

o Root Complex and EndPoint Modes of

o Local Bus modes:

o Local Bus Clock rates to 66MHz

o Zero wait state bursts to 264 MB/sec

o 1 Lane PCI Express Port

o 2 DMA Channels

o Integrated SerDes

o 21mmx21mm, 337 pin PBGA package

o 3.3V I/O and 5V tolerant Local Bus

o Power: 1.0 Watt

PEX 8311 Additional Features

o Integrated PCI Express Interface

o VGA/ISA Enable Registers

o On-the-fly Endian conversion

o Multiple DMA operational modes

o Direct Master data transfers

o Direct Slave data transfers

o Control

Operation

- 32-bit address & 32-bit data C Mode

- Multiplexed 32-bit address/data J Mode

- Compliant to PCIe Specification, r1.0a

- x1 Link, dual-simplex, 2.5 Gbps/direction

- Auto Polarity reversal

- 128 Byte payload maximum

- Link CRC support

- Link/Device power management

- Flow control buffering

- PCIe transaction queues for eight

- Block and scatter/gather transfers

- DMA descriptor ring management

- Demand mode & EOT H/W controls

- Read ahead and programmable read pre-

- Generate any PCIe transaction

- 8-,16-, and 32-bit local bus access

- Writes, read ahead, posted writes,

- Eight mailbox and two doorbell registers

- Root Complex or EndPoint mode

- Serial EEPROM Interface

- DC JTAG Boundary Scan

- Four GPIO Pins, 1 GPO, 1 GPI

outstanding TLPs

fetch counter

programmable read pre-fetch counter

reset/interrupt

I2O Messaging Unit

Version 1.2 2005

Multi-purpose and Feature-Rich PCI Express Bridge

The bridge offers PCI Express™ (PCIe) bridging capability from a Generic

Local Bus to PCIe enabling users to add scalable high bandwidth

interconnection to a wide variety of applications including communication

line cards, surveillance systems, video capture cards, industrial control, office

automation, IP Media Servers, RAID systems and medical imaging. Many

embedded system designs utilizing PCI today can easily migrate to PCIe. The

ExpressLane™ PEX 8311 bridge can be used in Root Complex mode with the

device directly interfacing multiple local bus devices including processors and

FPGAs to a downstream PCIe port. The bridge can also function in an EndPoint

type application connecting multiple local bus components to an upstream PCIe

port.

Highly Flexible, Generic Local Bus

The PEX 8311 offers a highly flexible yet low overhead generic Local Bus

which provides a direct connection to two generic industry-standard

interconnect buses. The bus protocol can be set to the non-multiplexed

address and data mode with up to 32-bit transfers “C-Mode” or multiplexed

address/data with up to 32-bit transfers “J-Mode”. This bus can be directly

connected to many processors with minimal or no glue logic. Memory,

FPGAs, FIFOs and other devices can be simultaneously placed on this bus.

Dual Independent DMA Channels

The PEX 8311 provides two data transfer channels each with internal

independent programmable FIFOs. These channels provide independent data

transfers with the bridge initiating both the PCIe and local bus. With dual

channels, data from two different sources or bidirectional traffic can be

transferred simultaneously without the need to finish one transfer before

starting the second. Each DMA channel can use independent scatter-gather

descriptor lists for increased flexibility. The use of DMA descriptors allows

the two channels to look like multiple virtual DMA channels.

Complete Conversion from PCI Express Signaling

The PEX 8311 provides a complete local bus to PCIe translation. The bridge

is equipped with a standard PCIe port that operates as a single x1 link with a

maximum of 250 Megabytes per second of throughput per transmit and

receive directions. The single 2.5 Gbps integrated SerDes delivers the highest

bandwidth with the lowest possible pin-count. The device supports internal

queues with flow control features to optimize throughput and traffic flow.

Root Complex and EndPoint Modes

The PEX 8311 bridge supports both Root Complex and EndPoint modes of

operation. This flexibility allows a Root Complex system designer to utilize

the part as a type of “north bridge” whereby multiple Local Bus components

present including a processor, FPGAs, memory, DSP, etc., can communicate with

each other as well with downstream PCIe devices. In this case, the bridge’s

configuration and system hierarchy comes through the Local Bus. In EndPoint

mode, the bridge is configured through the PCIe port.

PCI Express to Generic Local Bus Bridge

PEX 8311

Related parts for pex-8311

pex-8311 Summary of contents

Page 1

... DMA channels. Complete Conversion from PCI Express Signaling The PEX 8311 provides a complete local bus to PCIe translation. The bridge is equipped with a standard PCIe port that operates as a single x1 link with a maximum of 250 Megabytes per second of throughput per transmit and receive directions ...

Page 2

... PCI Express’ bandwidth, system control, and data integrity. Internal Block Diagram Figure 1 below shows an overview of the PEX 8311 Bridge. The device provides for full FIFO memory buffers for each DMA channel and for Direct Master and Direct Slave operation. A complete three layer PCIe ...

Page 3

... In this type application, the bridge’s x1 lane PCIe 2.5 Gbps bandwidth in combination with its large local bus capacitive loading can support up to five simultaneous input sources on each PEX 8311. With a Local Bus MHz and 32-bit data, complete bandwidth matching with the PCIe port can be achieved in unidirectional designs. ...

Page 4

... Software Usage Model From a system model viewpoint, the PEX 8311 has its own set of PCI Express configuration registers through the upstream port that the BIOS or host can configure the other ports using standard PCI enumeration. The Configuration Space Registers (CSRs) ...

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