en5311qi-e Enpirion, en5311qi-e Datasheet
en5311qi-e
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en5311qi-e Summary of contents
Page 1
... EN5311QI is engineered to simplify design and to minimize layout constraints. GND switching frequency and internal type III V SENSE compensation response. Switch EN5311QI is ideal for space and height V FB constrained applications. A 3-pin VID output voltage selector provides Voltage Select seven pre-programmed output voltages along Package Boundry with an option for external resistor divider ...
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... Bottom Thermal Pad: Device thermal pad to remove heat from package. Connect to PCB surface ground pad and PCB internal ground plane (see layout recommendations). These pins 2 11/24/2009 EN5311QI Sense pin for output Connect V to the SENSE = 0.603V. FB ≥ 1.4V. HIGH ≤ 0.2V. Logic high is defined LOW www ...
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... PWM Comp (+) Sawtooth Generator Figure 3. Functional block diagram. ©Enpirion 2009 all rights reserved, E&OE 03799 P-Drive Logic N-Drive Compensation Network (-) Switch Error Amp (+) DAC Voltage VREF Select VS0 VS1 VS2 3 11/24/2009 EN5311QI OUT GND V SENSE V FB Package Boundry www.enpirion.com Rev:B ...
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... Thermal Resistance: Junction to Ambient (0 LFM) Thermal Resistance: Junction to Case (0 LFM) Thermal Shutdown Thermal Shutdown Hysteresis ©Enpirion 2009 all rights reserved, E&OE 03799 SYMBOL STG SYMBOL OUT T 4 11/24/2009 EN5311QI MIN MAX UNITS -0.3 7.0 -0 0.3 IN -0.3 2.7 -65 150 260 2000 MIN MAX UNITS 2.4 5.5 IN 2.4 6 ...
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... ENABLE pin crosses its logic High threshold UVLO 5 11/24/2009 = 4.7μF, C =10uF. IN OUT MIN TYP MAX 2.4 5.5 1 2.4 6.6 2.2 2.3 0.145 -2.0 +2.0 -3.0 +3.0 0.591 0.603 0.615 0.585 0.603 0.621 1 1.24 1.65 2.1 1000 0.75 800 1.4 2 0.0 0.4 1 0.0 0.2 1 340 270 .110 1.24 1.65 2.1 0.80 1.10 1.40 www.enpirion.com EN5311QI UNITS V/mS mA μA μ μA MHz mΩ mΩ Ω V/mS mS Rev:B ...
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... V V out out 50mV/Div 50mV/Div I I Load Load 500mA/Div 500mA/Div load load Output Ripple 10µF 0805 V 6 11/24/2009 EN5311QI 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Load Current (A) = 2.5 V, 1.8 V, 1.5 V, 1.2 V, 0.8 V OUT = 5.0V = 5.0V 400μs/Div 400μs/Div = 3.3V = 3.3V = 3.3V = 3.3V 20μs/Div 20μs/Div ...
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... OUT the Power MOSFETS and the integrated inductor. The EN5311QI operates in a constant slew rate when the output voltage is programmed with an internal VID code. The EN5311QI, when in external resistor divider mode, has constant start up time. Electrical Characteristics table for soft-start ...
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... Under Voltage Lockout Application Information Output Voltage Select To provide the highest degree of flexibility in choosing output voltage, the EN5311QI uses a 3 pin VID, or Voltage ID, output voltage select arrangement. This allows the designer to choose one of seven preset voltages use an external voltage divider. ...
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... External Voltage Divider As described above, the external voltage divider option is chosen by connecting the VS0, VS1, and VS2 pins to V The EN5311QI uses a separate feedback pin, VFB, when using the external divider. For applications with V ≤ 5.5V, VSENSE must IN be connected to VOUT as indicated in Figure 4. ...
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... PCB Layout file downloadable from the Enpirion Website to assure first pass design success. Recommendation 1: Input and output filter capacitors should be placed on the same side of the PCB, and as close to the EN5311QI package as possible. They should be connected to the device with very short and wide traces. Do not use thermal reliefs or spokes when connecting the capacitor pads to the respective nodes ...
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... PCB layer 2 immediately underneath the EN5311QI and its input and output capacitors. The vias that connect the input and output capacitor grounds, and the thermal pad to the ground island, should continue through to the PCB GND layer as well ...
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... Only the large thermal pad and the perimeter pin pads are to be mechanically or electrically connected to the PC board. The PCB top layer under the EN5311QI should be clear of any metal except for the large thermal pad. The “grayed-out” area in Figure 9 represents the area that should be clear of any metal (traces, vias, or planes), on the top layer of the PCB ...
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... PCB. JEDEC minimum separation = 0.20 JEDEC minimum separation = 0.20 Figure 10. Exposed pad clearances; the Enpirion lead frame package complies with JEDEC requirements. ©Enpirion 2009 all rights reserved, E&OE 03799 0.25 0.25 0.25 0.25 0.20 0.20 0.20 0.20 0.20 0.20 13 11/24/2009 EN5311QI Thermal Pad. Connect to Ground plane www.enpirion.com Rev:B ...
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... Figure 11. Recommended solder mask opening. ©Enpirion 2009 all rights reserved, E&OE 03799 14 11/24/2009 EN5311QI www.enpirion.com Rev:B ...
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... Figure 12. Package mechanical dimensions. ©Enpirion 2009 all rights reserved, E&OE 03799 15 11/24/2009 EN5311QI www.enpirion.com Rev:B ...
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... Ordering Information Part Number EN5311QI EN5311QI-E Contact Information Enpirion, Inc. Perryville III 53 Frontage Road, Suite 210 Hampton, NJ 08827 USA Phone: +1 908-894-6000 Fax: +1 908-894-6090 www.enpirion.com Enpirion reserves the right to make changes in circuit design and/or specifications at any time without notice. Information furnished by Enpirion is believed to be accurate and reliable ...