adum5200 Analog Devices, Inc., adum5200 Datasheet
adum5200
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adum5200 Summary of contents
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... Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Dual-Channel Isolators with Integrated DC/DC Converter ADuM5200/5201/5202 FUNCTIONAL BLOCK DIAGRAMS Figure 1ADuM520x Functional Diagrams 1 Protected by U.S. Patents 5,952,849, 6,873,065. and 7075 329 B2, Other patents pending ...
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... REVISION HISTORY Pin Configuration and Function Descriptions........................... 12 Typical Performance Characteristics ....................................... 15 Application Information................................................................ 17 Theory of operation ................................................................... 18 PC Board Layout ........................................................................ 18 Thermal Analysis ....................................................................... 18 Propagation Delay-Related Parameters................................... 19 DC Correctness and Magnetic Field Immunity........................... 19 Power Consumption .................................................................. 20 Insulation Lifetime ..................................................................... 21 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 23 Rev. PrA | Page ADuM5200/5201/5202 ...
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... PHL PLH PWD PSK t 50 PSKCD/ PHL PLH Rev. PrA | Page ADuM5200/5201/5202 1 = 25° ISO SEL Unit Test Conditions V I =0mA ISO mV/V I =50mA, V =4.5V to 5.5V ISO DD1 % I = 10mA to 90mA ISO =0.1μ ...
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... ADuM5200/5201/5202 Parameter 11 Pulse-Width Distortion, |t − PLH PHL Change vs. Temperature 16 Propagation Delay Skew Channel-to-Channel Matching, Codirectional Channels 17 Channel-to-Channel Matching, 17 Opposing-Directional Channels Output Rise/Fall Time (10% to 90%) Common-Mode Transient Immunity at Logic High Output Common-Mode Transient Immunity at Logic Low Output Refresh Rate 1 All voltages are relative to their respective ground. ...
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... OAL OBL 0.0 0.4 OAL OBL PW 1000 100 PHL PLH PWD PSK t 50 PSKCD/OD Rev. PrA | Page ADuM5200/5201/5202 1 = 25° ISO SEL Unit Test Conditions V I =0mA ISO mV/V I =37.5 mA, V =3.0V to 3.6V ISO DD1 % I = 6mA to 54mA ISO =0.1μ ...
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... ADuM5200/5201/5202 Parameter 13 Minimum Pulse Width 14 Maximum Data Rate 15 Propagation Delay Pulse-Width Distortion, |t − PLH PHL Change vs. Temperature 16 Propagation Delay Skew Channel-to-Channel Matching, 17 Codirectional Channels Channel-to-Channel Matching, 17 Opposing-Directional Channels Output Rise/Fall Time (10% to 90%) Common-Mode Transient Immunity at Logic High Output ...
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... PHL PLH PWD PSK t 50 PSKCD/ PHL PLH Rev. PrA | Page ADuM5200/5201/5202 1 = 25° ISO SEL Unit Test Conditions V I =0mA ISO mV/V I =50mA, V =4.5V to 5.5V ISO DD1 % I = 10mA to 100mA ISO =0.1μ ...
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... ADuM5200/5201/5202 Parameter 11 Pulse-Width Distortion, |t − PLH PHL Change vs. Temperature 16 Propagation Delay Skew Channel-to-Channel Matching, Codirectional Channels 17 Channel-to-Channel Matching, 17 Opposing-Directional Channels Output Rise/Fall Time (10% to 90%) Common-Mode Transient Immunity at Logic High Output Common-Mode Transient Immunity at Logic Low Output Refresh Rate 1 All voltages are relative to their respective ground. ...
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... Unit 2500 V rms 1 minute duration L(I01) >8 min mm L(I02) >8 min mm 0.017 min mm CTI >175 V IIIa Rev. PrA | Page ADuM5200/5201/5202 Unit Test Conditions Ω MHz pF °C/W Thermocouple located at center of package underside, test conducted on 4 layer board with thin traces °C T Rising J ° ...
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... ADuM5200/5201/5202 DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. The * marking on packages denotes DIN V VDE V 0884-10 approval. Table 7. Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ ...
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... Data outputs valid for any active power configuration WARNING! This combination of RC Damage will occur on the secondary due to exess output voltage at V ISO master isoPower part.. Rev. PrA | Page ADuM5200/5201/5202 and RC is prohibited. IN SEL . RCin must be either Low or a PWM signal from a ...
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... Preliminary Technical Data PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 12. ADuM5200 Pin Function Descriptions Pin No. Mnemonic Description 1 V Primary Supply Voltage 3.0V to 5.5 V. DD1 2,8 GND Ground 1. Ground reference for isolator primary. Pin 2 and Pin 8 are internally connected, and it is recommended that both 1 pins be connected to a common ground. ...
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... RC SEL is low, this combination will cause excessive volatge on the SEL = V then the Viso set point is 5.0V, When V SEL ISO Rev. PrA | Page ADuM5200/5201/5202 of a master OUT =High) this pin has no SEL = GND Then the VISO setpoint SEL ISO ...
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... ADuM5200/5201/5202 Table 14. ADuM5202 Pin Function Descriptions Pin No. Mnemonic Description 1 V Primary Supply Voltage 3.0V to 5.5 V. DD1 2,8 GND Ground 1. Ground reference for isolator primary. Pin 2 and Pin 8 are internally connected, and it is recommended that both 1 pins be connected to a common ground Logic Output A. ...
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... Figure 8. Typical Short Circuit Input Current and Power vs. V voltage 0.08 0.1 0.12 Figure 9. Typical V 3. 3.3V out 3.3V out out 0.25 0.3 0.35 Figure 10. Typical Transient Load Response 3V Output 10%-100% Load as a function of ISO Idd Pow er 5.5 6 6.5 supply DD Rev. PrA | Page ADuM5200/5201/5202 Transient Load Response 5V Output 10%-90% ISO Load Step Step ...
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... ADuM5200/5201/5202 Figure 11. Typical Viso=5V Output Voltage Ripple at 90% Load Figure 12. Typical Viso=3.3V Output Voltage Ripple at 90% Load out 3.3V in 3.3V out 3.3V out bps ) Figure 13. . Typical I Supply Current per Forward Data Channel (15 pF ...
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... The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. Maximum Data Rate The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. Rev. PrA | Page ADuM5200/5201/5202 signal to the 50% level of the rising edge of ) PSK and/or PHL ...
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... ADuM5200/5201/5202 APPLICATION INFORMATION THEORY OF OPERATION The DC/DC converter section of the ADuM520x works on principles that are common to most modern power supply designs implemented as a secondary side controller with isolated PWM feedback. V power is supplied to an oscillating DD1 circuit that switches current into a chip-scale air core transformer ...
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... For the 1 MHz example noted, one would have to place a 0.5 kA current 5 mm away from the ADuM520x to affect the component’s operation. Rev. PrA | Page ADuM5200/5201/5202 th turn in the receiving coil (cm). 10k 100k ...
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... ADuM5200/5201/5202 1000 100 10 DISTANCE = 100mm 1 DISTANCE = 5mm 0.1 0.01 1k 10k 100k 1M MAGNETIC FIELD FREQUENCY (Hz) Figure 20. Maximum Allowable Current for Various Current-to-ADuM520x Spacings Note that at combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces could induce error voltages sufficiently large enough to trigger the thresholds of succeeding circuitry ...
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... SEL part will act as a stand alone self regulated device or slave device. When the ADuM5200 is acting as a slave, its power is regulated by the master device allowing multiple isoPower parts to be combined in parallel while sharing the load equally. When the ADuM5000 is configured as a Stand alone unit, it generates its own PWM feedback signal to regulate itself and slave devices ...
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... ADuM5200/5201/5202 for several operating conditions are determined. These factors allow calculation of the time to failure at the actual working voltage. The values shown in Table 10 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition, and the maximum CSA/VDE approved working voltages. In many cases, the approved working voltage is higher than 50-year service life voltage ...
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... Rev. PrA | Page ADuM5200/5201/5202 0.75 (0.0295) × 45° 0.25 (0.0098) 8° 0° 1.27 (0.0500) 0.40 (0.0157) Package Option −40 to +105 16-Lead SOIC_W −40 to +105 16-Lead SOIC_W −40 to +105 16-Lead SOIC_W −40 to +105 16-Lead SOIC_W −40 to +105 16-Lead SOIC_W − ...