ht82k96a Holtek Semiconductor Inc., ht82k96a Datasheet
ht82k96a
Related parts for ht82k96a
ht82k96a Summary of contents
Page 1
... This device is an 8-bit high performance RISC-like microcontroller designed for USB product applications particularly suitable for use in products such as Rev. 1.50 HT82K96A 4 endpoints supported (endpoint 0 included) 4096 15 program memory ROM 160 8 data memory RAM HALT function and wake-up feature reduce power ...
Page 2
... Block Diagram Rev. 1.50 2 HT82K96A August 25, 2006 ...
Page 3
... PB6, PB7 can be used as USB mouse button input for mouse Hardware wake-up function Bidirectional I/O lines. Software instructions determine the CMOS out- put or Schmitt trigger input with pull-high resistor (determined by 1-bit pull-high option). PD4 can be used as USB mouse button input for mouse hardware wake-up function 3 HT82K96A August 25, 2006 ...
Page 4
... SYS f =12MHz SYS 5V No load, f =6MHz SYS 5V No load, f =12MHz SYS No load, system HALT, 5V USB suspend No load, system HALT, 5V USB suspend =3. =0. =0. HT82K96A Ta=25 C Min. Typ. Max. Unit 4.4 5.5 V 4.4 5 250 A 230 0.4V 0 ...
Page 5
... Test Conditions Min. Typ. Max. V Conditions Without WDT prescaler 4 8 Without WDT prescaler 1024 1 Wake-up from HALT 1024 Power-up, Watchdog 1024 Time-out from normal HT82K96A Max. Unit 4 LSB Ta=25 C Unit 12 MHz 12 MHz 70 s ...
Page 6
... Program Counter S10 Program Counter S11~S0: Stack register bits @7~@0: PCL bits 6 HT82K96A * ...
Page 7
... The activated level is indexed by the stack pointer (SP) and is neither readable nor writeable. Table Location * Table Location P11~P8: Current program counter bits 7 HT82K96A * August 25, 2006 ...
Page 8
... All of the data memory areas can handle arithmetic, logic, increment, decrement and rotate operations di- rectly. Except for some dedicated bits, each bit in the data memory can be set and reset by SET [m].i and CLR [m].i . They are also indirectly accessible through memory pointer registers (MP0 or MP1). 8 HT82K96A August 25, 2006 ...
Page 9
... Any data written into the status register will not change the TO or PDF flag. In addi- tion operations related to the status register may give different results from those intended. Function Status (0AH) Register 9 HT82K96A August 25, 2006 ...
Page 10
... Host PC, the suspend line (bit0 of USC) of the HT82K96A is set and a USB interrupt is also triggered. Also when HT82K96A receive a Resume signal from Host PC, the resume line (bit3 of USC) of HT82K96A is set and a USB interrupt is triggered. Whatever there are USB reset signal is detected, the USB interrupt is triggered ...
Page 11
... This timer is designed to prevent a software malfunction or sequence from jumping to an unknown location with unpredictable results. The Watchdog Timer can be disabled by ROM code option. If the Watchdog Timer is disabled, all the executions related to the WDT result in no operation. Watchdog Timer 11 HT82K96A August 25, 2006 ...
Page 12
... To minimize power consumption, all the I/O pins should be carefully managed before entering the HALT status. Reset There are three ways in which a reset can occur: RES reset during normal operation RES reset during HALT WDT time-out reset during normal operation 12 HT82K96A (system clock SYS August 25, 2006 ...
Page 13
... The functional unit chip reset status are shown below. Program Counter 000H Interrupt Disable Prescaler Clear Clear. After master reset, WDT WDT begins counting Timer/event Counter Off Input/output Ports Input mode Stack Pointer Points to the top of the stack 13 HT82K96A August 25, 2006 ...
Page 14
... HT82K96A USB-Reset USB-Reset (Normal) (HALT) uuuu uuuu uuuu uuuu 00-0 1000 00-0 1000 uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ...
Page 15
... Rev. 1.50 The Timer/Event Counter 1 contains an 16-bit program- mable count-up counter and the clock may come from an external source or from the system clock divided by 4. Function TMR0C (0EH) Register Function TMR1C (11H) Register Timer/Event Counter 0 Timer/Event Counter 1 15 HT82K96A August 25, 2006 ...
Page 16
... Counter 0/1 reloading will occur at the same time). When the Timer /E vent Count er 0 eading /4 SYS TMR0/TMR1) is read, the clock will be blocked to avoid errors. As clock blocking may results in a counting error, this must be taken into consideration by the program- mer. 16 HT82K96A August 25, 2006 ...
Page 17
... It should be noted that a non-pull-high/low I/O line operating in input mode will cause a floating state recommended that unused or not bonded out I/O lines should be set as output pins by software instruction to avoid consuming power under input floating state. Input/Output Ports 17 HT82K96A August 25, 2006 ...
Page 18
... HT82K96A will wake-up the MCU by I/O method, otherwise the MCU is in suspend mode. How long the HT82K96A to turn on the IRPT, and the low pulse period of the PC0 is defined by bit0~3 of the WDTS (wake-up period) and the bit0~bit2 of the SCC (LED_on period) respectively. The following diagram show the IRPT control pin timing ...
Page 19
... PS2DAO should set to 1. Otherwise it always read 0. If SPS2=0, and SUSB=1, the HT82K96A is defined as USB interface. Both the USBD- and USBD+ is driving by SIE of the HT82K96A. The user only write or read the USB data through the corresponding FIFO. Both SPS2 and SUSB is default 0 . ...
Page 20
... Stall the endpoint 3 7~4 W Unused bit, read as 0 Bit No. Label R/W 0 EP0RW R Endpoint 0 accessed 1 EP1RW R Endpoint 1 accessed 2 EP2RW R Endpoint 2 accessed 3 EP3RW R Endpoint 3 accessed 7~4 R Unused bit, read as 0 Rev. 1.50 Function AWR (42H) Register Function STALL (43H) Register Function PIPE (44H) Register 20 HT82K96A August 25, 2006 ...
Page 21
... It is used to indicate that a 0-sized packet is sent from host to MCU. This bit should be 7 LEN0 R/W cleared by firmware. Rev. 1.50 Bit5 Bit4 Bit3 Bit2 Reserved bit 01000101B Description SIES (45H) Register Table Function MISC (46H) Register 21 HT82K96A Bit1 Bit0 F0_ERR Adr_set R/W R/W August 25, 2006 ...
Page 22
... Function USC (1AH) Register 22 HT82K96A Bit7~Bit0 Data7~Data0 Data7~Data0 Data7~Data0 Data7~Data0 ...
Page 23
... WDT timer overflow will wake-up MCU system 1 : WDT timer overflow will start hardware wake-up detect circuit but not wake-up MCU system. Rev. 1.50 Function USR (1BH) Register Function 001: 3 base 011: 9 base 101: 33 base 111: 127 base SCC (1CH) Register 23 HT82K96A August 25, 2006 ...
Page 24
... WDT enable or disable 9 WDT clock source WDTOSC SYS 10 CLRWDT instruction(s PA0~PA7 output structures: CMOS/NMOS open-drain/PMOS open-drain (by bit) 12 PA0~PA7 wake-up enabled or disabled (by bit) 13 A/D converter enabled or disabled Rev. 1.50 Function ADSC (1DH) Register Function ADR (1EH) Register Option 24 HT82K96A August 25, 2006 ...
Page 25
... RES to high. X1 can use 6MHz or 12MHz close OSC1 & OSC2 as possible Components with * are used for EMC issue. Components with ** are used for resonator only. Components with *** are used for 12MHz application. Rev. 1.50 25 HT82K96A August 25, 2006 ...
Page 26
... Rotate data memory left through carry Data Move MOV A,[m] Move data memory to ACC MOV [m],A Move ACC to data memory MOV A,x Move immediate data to ACC Bit Operation CLR [m].i Clear bit of data memory SET [m].i Set bit of data memory Rev. 1.50 Description 26 HT82K96A Instruction Flag Cycle Affected 1 Z,C,AC,OV (1) 1 Z,C,AC,OV 1 Z,C,AC,OV 1 Z,C,AC,OV (1) 1 ...
Page 27
... The flags may be affected by the execution status. If the Watchdog Timer is cleared by executing the CLR WDT1 or CLR WDT2 instruction, the TO and PDF are cleared. Otherwise the TO and PDF flags remain unchanged. Rev. 1.50 Description 27 HT82K96A Instruction Flag Cycle Affected 2 None (2) 1 None ...
Page 28
... Add the accumulator to the data memory Description The contents of the specified data memory and the accumulator are added. The result is stored in the data memory. Operation [m] ACC+[m] Affected flag(s) TO Rev. 1.50 PDF PDF PDF PDF PDF HT82K96A August 25, 2006 ...
Page 29
... Program Counter+1 Program Counter Affected flag(s) TO CLR [m] Clear data memory Description The contents of the specified data memory are cleared to 0. Operation [m] 00H Affected flag(s) TO Rev. 1.50 PDF PDF PDF addr PDF PDF HT82K96A August 25, 2006 ...
Page 30
... Each bit of the specified data memory is logically complemented (1 s complement). Bits which previously contained a 1 are changed to 0 and vice-versa. Operation [m] [m] Affected flag(s) TO Rev. 1.50 PDF PDF PDF PDF PDF HT82K96A August 25, 2006 ...
Page 31
... Data in the specified data memory is decremented by 1, leaving the result in the accumula- tor. The contents of the data memory remain unchanged. Operation ACC [m] 1 Affected flag(s) TO Rev. 1.50 PDF (ACC.3~ACC.0)+6, AC1=AC (ACC.3~ACC.0), AC1=0 ACC.7~ACC.4+6+AC1,C=1 ACC.7~ACC.4+AC1,C=C PDF PDF PDF HT82K96A August 25, 2006 ...
Page 32
... Move data memory to the accumulator Description The contents of the specified data memory are copied to the accumulator. Operation ACC [m] Affected flag(s) TO Rev. 1.50 Program Counter+1 PDF PDF PDF addr PDF PDF HT82K96A August 25, 2006 ...
Page 33
... PDF ¾ ¾ ¾ ¾ PDF ¾ ¾ ¾ ¾ PDF ¾ ¾ Ö ¾ PDF ¾ ¾ Ö ¾ PDF ¾ ¾ Ö ¾ 33 HT82K96A C ¾ C ¾ C ¾ C ¾ C ¾ C ¾ August 25, 2006 ...
Page 34
... The contents of the data memory remain unchanged. Operation ACC.(i+1) ACC.0 [m].7 Affected flag(s) TO Rev. 1.50 Stack PDF Stack PDF Stack PDF PDF [m].i; [m].i:bit i of the data memory (i=0~6) PDF HT82K96A August 25, 2006 ...
Page 35
... Bit 0 replaces the carry bit; the original carry flag is rotated into the bit 7 position. Operation [m].i [m].(i+1); [m].i:bit i of the data memory (i=0~6) [m]. [m].0 Affected flag(s) TO Rev. 1.50 PDF [m].i; [m].i:bit i of the data memory (i=0~6) PDF PDF PDF PDF HT82K96A August 25, 2006 ...
Page 36
... Otherwise proceed with the next instruction (1 cycle). Operation Skip if ([m] 1)=0, ACC Affected flag(s) TO Rev. 1.50 PDF PDF PDF ([m] 1) PDF ([m] 1) PDF HT82K96A August 25, 2006 ...
Page 37
... Other- wise proceed with the next instruction (1 cycle). Operation Skip if [m].i 0 Affected flag(s) TO Rev. 1.50 PDF PDF ([m]+1) PDF ([m]+1) PDF PDF HT82K96A August 25, 2006 ...
Page 38
... The low-order and high-order nibbles of the specified data memory are interchanged, writ- ing the result to the accumulator. The contents of the data memory remain unchanged. Operation ACC.3~ACC.0 ACC.7~ACC.4 Affected flag(s) TO Rev. 1.50 PDF PDF PDF [m].7~[m].4 PDF [m].7~[m].4 [m].3~[m].0 PDF HT82K96A August 25, 2006 ...
Page 39
... The low byte of ROM code (last page) addressed by the table pointer (TBLP) is moved to the data memory and the high byte transferred to TBLH directly. Operation [m] ROM code (low byte) TBLH ROM code (high byte) Affected flag(s) TO Rev. 1.50 PDF PDF PDF PDF PDF HT82K96A August 25, 2006 ...
Page 40
... Logical XOR immediate data to the accumulator Description Data in the accumulator and the specified data perform a bitwise logical Exclusive_OR op- eration. The result is stored in the accumulator. The 0 flag is affected. Operation ACC ACC XOR x Affected flag(s) TO Rev. 1.50 PDF PDF PDF HT82K96A August 25, 2006 ...
Page 41
... Package Information 28-pin SOP (300mil) Outline Dimensions Symbol Rev. 1.50 Dimensions in mil Min. Nom. 394 290 14 697 HT82K96A Max. 419 300 20 713 104 August 25, 2006 ...
Page 42
... SSOP (300mil) Outline Dimensions Symbol Rev. 1.50 Dimensions in mil Min. Nom. 395 291 8 613 HT82K96A Max. 420 299 12 637 August 25, 2006 ...
Page 43
... Key Slit Width T1 Space Between Flange T2 Reel Thickness SSOP 48W Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.50 Dimensions in mm 330 1 62 1.5 13+0.5 0.2 2 0.5 24.8+0.3 0.2 30.2 0.2 Dimensions in mm 330 1 100 0.1 13+0.5 0.2 2 0.5 32.2+0.3 0.2 38.2 0.2 43 HT82K96A August 25, 2006 ...
Page 44
... Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.50 Dimensions 0.3 12 0.1 1.75 0.1 11.5 0.1 1.5+0.1 1.5+0.25 4 0.1 2 0.1 10.85 0.1 18.34 0.1 2.97 0.1 0.35 0.01 21.3 44 HT82K96A August 25, 2006 ...
Page 45
... Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K1 Cavity Depth K2 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.50 Dimensions 0.3 16 0.1 1.75 0.1 14.2 0.1 2 Min. 1.5+0.25 4 0.1 2 0.1 12 0.1 16.2 0.1 2.4 0.1 3.2 0.1 0.35 0.05 25.5 45 HT82K96A August 25, 2006 ...
Page 46
... Holtek s products are not authorized for use as critical components in life support devices or sys- tems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.50 46 HT82K96A August 25, 2006 ...