lc4064zc-75t100 Lattice Semiconductor Corp., lc4064zc-75t100 Datasheet

lc4064zc-75t100

Manufacturer Part Number

lc4064zc-75t100

Description

3.3v/2.5v/1.8v In-system Programmable Superfast High Density Plds Tm

Manufacturer

Lattice Semiconductor Corp.

Datasheet

1.LC4064ZC-75T100.pdf (91 pages)

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BOSTOCK HK LIMITED

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lc4064zc-75t100C

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BOSTOCK HK LIMITED

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lc4064zc-75t100E

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lc4064zc-75t100I

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January 2004

Features

■ High Performance

■ Ease of Design

■ Zero Power (ispMACH 4000Z) and Low

Table 1. ispMACH 4000V/B/C Family Selection Guide

or product names are trademarks or registered trademarks of their respective holders. The speciﬁcations and information herein are subject to change without notice.

www.latticesemi.com

Macrocells

I/O + Dedicated

Inputs

Supply Voltages (V)

Pins/Package

1. 3.3V (4000V) only.

2. 128-I/O and 160-I/O conﬁgurations.

MAX

(ns)

Power (ispMACH 4000V/B/C)

(MHz)

• f

• t

• Up to four global clock pins with programmable

• Up to 80 PTs per output

• Enhanced macrocells with individual clock,

• Up to four global OE controls

• Individual local OE control per I/O pin

• Excellent First-Time-Fit

• Fast path, SpeedLocking

• Wide input gating (36 input logic blocks) for fast

• Typical static current 10µA (4032Z)

• Typical static current 1.3mA (4000C)

• 1.8V core low dynamic power

• ispMACH 4000Z operational down to 1.6V V

clock polarity control

reset, preset and clock enable controls

path

counters, state machines and address decoders

MAX

= 2.5ns propagation delay

= 400MHz maximum operating frequency

3.3/2.5/1.8V

4032V/B/C

30+2/32+4

ispMACH

44 TQFP

48 TQFP

400

2.5

1.8

2.2

and reﬁt

Path, and wide-PT

Coolest Power

ispMACH 4000V/B/C/Z Family

3.3/2.5/1.8V

30+2/32+4/

4064V/B/C

100 TQFP

ispMACH

44 TQFP

48 TQFP

64+10

400

2.5

1.8

2.2

64+10/92+4/

3.3/2.5/1.8V

4128V/B/C

144 TQFP

100 TQFP

128 TQFP

ispMACH

96+4

128

333

2.7

1.8

2.7

■ Broad Device Offering

■ Easy System Integration

• Multiple temperature range support

• Superior solution for power sensitive consumer

• Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O

• Operation with 3.3V (4000V), 2.5V (4000B) or

• 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI

• Hot-socketing

• Open-drain capability

• Input pull-up, pull-down or bus-keeper

• Programmable output slew rate

• 3.3V PCI compatible

• IEEE 1149.1 boundary scan testable

• 3.3V/2.5V/1.8V In-System Programmable

• I/O pins with fast setup path

• Lead-free package options

3.3V/2.5V/1.8V In-System Programmable

– Commercial: 0 to 90°C junction (T

– Industrial: -40 to 105°C junction (T

– Automotive: -40 to 130°C junction (T

applications

1.8V (4000C/Z) supplies

interfaces

(ISP™) using IEEE 1532 compliant interface

64+10/96+14/

128+4/160+4

3.3/2.5/1.8V

256 fpBGA

4256V/B/C

144 TQFP

100 TQFP

176 TQFP

ispMACH

256

322

3.0

2.0

2.7

SuperFAST High Density PLDs

128+4/192+4

3.3/2.5/1.8V

4384V/B/C

256 fpBGA

176 TQFP

ispMACH

384

322

3.5

2.0

2.7

128+4/208+4

3.3/2.5/1.8V

4512V/B/C

256 fpBGA

176 TQFP

ispMACH

)

ispm4k_20z

Data Sheet

)

512

322

3.5

2.0

2.7

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