gal18v10b-7lp Lattice Semiconductor Corp., gal18v10b-7lp Datasheet
gal18v10b-7lp
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gal18v10b-7lp Summary of contents
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... GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified. Copyright © 2003 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. ...
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... Part Number Description GAL18V10B Device Name Speed (ns Low Power Power B ...
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Output Logic Macrocell (OLMC) The GAL18V10 has a variable number of product terms per OLMC. Of the ten available OLMCs, two OLMCs have access to ten prod- uct terms (pins 14 and 15), and the other eight OLMCs have eight ...
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Registered Mode ACTIVE LOW Combinatorial Mode ACTIVE LOW Specifications GAL18V10 ...
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GAL18V10 Logic Diagram/JEDEC Fuse Map 0000 0036 . . . 0324 0360 . . . 0648 2 0684 . . . 0972 3 1008 . . . 1296 4 1332 . . . . 1692 5 1728 ...
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... The leakage current is due to the internal pull-up on all pins. See Input Buffer section for more information. 2) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester ground degradation. Characterized but not 100% tested. 3) Typical values are at Vcc = 5V and T Specifications GAL18V10B Recommended Operating Conditions (1) Commercial Devices: +1 ...
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... Calculated from fmax with internal feedback. Refer to fmax Description section. 3) Refer to fmax Description section. Capacitance (T = 25° 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL18V10B Over Recommended Operating Conditions COM -7 MIN. MAX. — 7.5 — 5.5 — 3.5 5.5 — 0 — ...
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Switching Waveforms INPUT or I/O FEEDB ACK CO MB INA Combinatorial Output INPUT or I/O FEEDB ACK t dis Input or I/O to Output Enable/Disable ...
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Descriptions CLK LOGIC REGISTER ARRAY max with External Feedback 1/( Note: fmax with external feedback is cal- culated from measured tsu and tco. LOGIC REGISTER ARRAY max with No ...
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Electronic Signature An electronic signature is provided in every GAL18V10 device. It contains 64 bits of reprogrammable memory that can contain user- defined data. Some uses include user ID codes, revision numbers, or inventory control. The signature data is always ...
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Power-Up Reset INTERNAL REGISTER Q - OUTPUT ACTIVE LOW OUTPUT REGISTER ACTIVE HIGH OUTPUT REGISTER Circuitry within the GAL18V10 provides a reset signal to all reg- isters during power-up. All internal registers will have their Q outputs set low after ...
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... GAL18V10B: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0 Number of Outputs Switching Delta Tpd vs Output Loading ...
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... GAL18V10B: Typical AC and DC Characteristic Diagrams Vol vs Iol 1 0.75 0.5 0. Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 Vin (V) Voh vs Ioh Ioh(mA) Normalized Icc vs Temp 1.2 1.1 1 0.9 0.8 5.50 -55 - Temperature (deg. C) ...
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... GAL18V10B: Typical AC and DC Characteristic Diagrams Normalized Tpd vs. Vcc 1.3 1.2 1.1 1 0.9 0 -> -> H 0.7 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Normalized Tpd vs. Temperature 1.3 1.2 1.1 1 0.9 0.8 0.7 -50 - 100 Ambient Temperature (°C) Delta Tpd vs Outputs Switching Max Max Outputs I vs 250 200 150 ...