hn58c65 Renesas Electronics Corporation., hn58c65 Datasheet

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hn58c65

Manufacturer Part Number
hn58c65
Description
8192-word X 8-bit Electrically Erasable And Programmable Cmos Rom
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Description
The Hitachi HN58C65 is a electrically erasable and programmable ROM organized as 8192-word
realizes high speed, low power consumption, and a high level of reliability, employing advanced MNOS
memory technology and CMOS process and circuitry technology. It also has a 32-byte page programming
function to make its erase and write operations faster.
Features
• Automatic byte write: 10 ms max
• Automatic page write (32 byte): 10 ms max
• Fast access time: 250 ns max
• Low power dissipation: 20 mW/MHz typ (Active)
Ordering Information
Type No.
HN58C65P-25
HN58C65FP-25
Note:
8192-word 8-bit Electrically Erasable and Programmable CMOS
Single 5 V Supply
On chip latches: address, data, CE, OE, WE
Data polling and Ready/Busy
Data protection circuity on power on/power off
Conforms to JEDEC byte-wide standard
Reliable CMOS with MNOS cell technology
10
10 year data retention
5
erase/write cycles (in page mode)
1. T is added to the end of the type no. for a SOP of 3.0 mm (max) thickness.
Access Time
250 ns
250 ns
2.0 mW typ (Standby)
HN58C65 Series
ROM
Package
600 mil 28 pin plastic DIP (DP-28)
28 pin plastic SOP
*1
(FP-28D/DA)
ADE-203-374A (Z)
Apr. 12, 1995
Rev. 1.0
8-bit. It

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hn58c65 Summary of contents

Page 1

... Electrically Erasable and Programmable CMOS Description The Hitachi HN58C65 is a electrically erasable and programmable ROM organized as 8192-word realizes high speed, low power consumption, and a high level of reliability, employing advanced MNOS memory technology and CMOS process and circuitry technology. It also has a 32-byte page programming function to make its erase and write operations faster ...

Page 2

... HN58C65 Series Pin Arrangement Pin Description Pin Name A0 – A12 I/O1 – I/ RDY/Busy HN58C65P/FP Series RDY/Busy 1 28 A12 (Top View) ...

Page 3

... Note Don’t care I/O0 Y Decoder X Decoder WE RDY/Busy V High High-Z V High High High HN58C65 Series I/O7 RDY/Busy I/O Buffer and Input Latch Y Gating Memory Array Data Latch I/O Dout High-Z Din High-Z — Data out (I/O7) ...

Page 4

... HN58C65 Series Absolute Maximum Ratings Parameter *1 Supply voltage *1 Input voltage *3 Operating temperature range Storage temperature range Notes: 1. With respect –3.0 V for pulse width 3. Including electrical characteristics and data retention. Recommended DC Operating Conditions Parameter Supply voltage Input voltage Operating temperature ...

Page 5

... — — 0.4 2.4 — — Min Typ Max — — 6 — — 10 HN58C65 Series Unit Test Conditions 5 Vin = 5 5 Vout = 5.5/0 Iout = 0 mA Duty = 100% Cycle = 5 ...

Page 6

... HN58C65 Series Read Cycle Parameter Symbol Address to output delay t ACC CE to output delay output delay t OE Address to output hold t OH OE, CE high to output float * Note defined at which the outputs archieve the open circuit conditions and are no longer driven. ...

Page 7

... WP t 200 — — 100 — — 0.30 — 30 BLC t 100 — — — — 120 — — 150 — — HN58C65 Series Unit Test Conditions ...

Page 8

... HN58C65 Series Byte Write Timing Waveform (1) (WE Controlled) Address Din RDY/Busy OES t DS High OEH High-Z ...

Page 9

... Byte Write Timing Waveform (2) (CE Controlled) Address Din High-Z RDY/Busy OES HN58C65 Series OEH High-Z ...

Page 10

... HN58C65 Series Page Write Timing Waveform (1) (WE Controlled) Address A5 to A12 Address OES Din High-Z RDY/Busy t BLC OEH t DW High-Z ...

Page 11

... Page Write Timing Waveform (2) (CE Controlled) Address A5 to A12 Address OES Din High-Z RDY/Busy t BLC HN58C65 Series OEH t DW High-Z ...

Page 12

... HN58C65 Series Data Polling Timing Waveform Address Din X I/O7 Functional Description Automatic Page Write Page-mode write feature allows bytes of data to be written into the EEPROM in a single write cycle. Following the initial byte cycle, an additional bytes can be written in the same manner. Each additional byte load cycle must be started within the preceding rising edge of the WE ...

Page 13

... To prevent this phenomenon, this device has a noise cancelation function that cuts noise if its width less in program mode. Be careful not to allow noise of a width of more than the control pins cycles in case of byte programming max 13 HN58C65 Series ...

Page 14

... HN58C65 Series 2. Data Protection at V On/Off CC When V is turned on or off, noise on the control pins generated by external circuits (CPU, etc.) may act trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in an unprogrammable state while the CPU unstable state ...

Page 15

... Package Dimensions HN58C65P series (DP-28) 35.60 36.50 Max 28 1 1.20 1.90 Max 2.54 ± 0.25 HN58C65FP Series (FP-28D) 18.30 18.75 Max 28 1 1.12 Max 1. 0.48 ± 0. 0.10 0.40 – 0.05 0.20 M 0.15 15 HN58C65 Series Unit: mm 15.24 + 0.11 0.25 – 0.05 0° – 15° Unit: mm 11.80 ± 0.30 1.70 0 – 10 ° 1.00 ± 0.20 ...

Page 16

... HN58C65 Series HN58C65FP Series (FP-28DA) 18.00 18.75 Max 28 1 1.27 Max 1.27 ± 0. 0.10 0.40 – 0.05 16 Unit: mm 11.80 ± 0.30 1.70 0 – 10 ° 1.00 ± 0.20 ...

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