sm72442mtx National Semiconductor Corporation, sm72442mtx Datasheet - Page 9

• Manufacturer Part Number: sm72442mtx
• Description: Programmable Maximum Power Point Tracking Controller For Photovoltaic Solar Panels
• Manufacturer: National Semiconductor Corporation

reg0 Register Description
reg1 Register Description
RESET PIN
When the reset pin is pulled low, the chip will cease its normal
operation and turn-off all of its PWM outputs including the
output of PM_OUT pin. Below is an oscilloscope capture of a
forced reset condition.
As seen in
load current are 28V and 1A respectively. After the reset pin
is grounded both the output voltage and load current de-
creases immediately. MOSFET switching on the buck-boost
converter also stops immediately. VLOB indicates the low
side boost output from the SM72295.
ANALOG INPUT
An equivalent circuit for one of the ADC input channels is
shown in
for the analog inputs. The operating range for the analog in-
puts is 0V to V
diodes to conduct and result in erratic operation.
The capacitor C1 in
is mainly the package pin capacitance. Resistor R1 is the on
resistance of the multiplexer and track / hold switch; it is typ-
ically 500Ω. Capacitor C2 is the ADC sampling capacitor; it is
typically 30 pF. The ADC will deliver best performance when
driven by a low-impedance source (less than 100Ω). This is
55:43
55:40
39:30
29:20
19:10
Bits
Bits
9:0
42
Figure
FIGURE 8. Forced Reset Condition
Figure
A
. Going beyond this range will cause the ESD
9. Diode D1 and D2 provide ESD protection
burnin_n
RSVD
8, the initial value for output voltage and
RSVD
ADC6
ADC4
ADC2
ADC0
Field
Field
Figure 9
has a typical value of 3 pF and
Reset Value
Reset Value
13'h0
16'h0
10'h0
10'h0
10'h0
10'h0
1'h0
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R/W
R/W
9
R
R
R
R
R
R
R
specially important when sampling dynamic signals. Also im-
portant when sampling dynamic signals is a band-pass or low-
pass filter which reduces harmonic and noise in the input.
These filters are often referred to as anti-aliasing filters.
DIGITAL INPUTS and OUTPUTS
The digital input signals have an operating range of 0V to
V
up and may be asserted before the digital supply V
V
nals operating range is controlled by V
voltage is V
(max).
SDA and SCL OPEN DRAIN OUTPUT
SCL and SDA output is an open-drain output and does not
have internal pull-ups. A “high” level will not be observed on
this pin until pull-up current is provided by some external
source, typically a pull-up resistor. Choice of resistor value
depends on many system factors; load capacitance, trace
length, etc. A typical value of pull- up resistor for SM72442
ranges from 2 kΩ to 10 kΩ. For more information, refer to the
I2C Bus specification for selecting the pull-up resistor value .
The SCL and SDA outputs can operate while being pulled up
to 5V and 3.3V.
I2C CONFIGURATION REGISTERS
The operation of the SM72442 can be configured through its
I2C interface. Complete register settings for I2C lines are
shown below.
A
D
, where V
= VDDD – VSSD, without any risk. The digital output sig-
Analog Channel 4 (iout_max: maximum allowed output
Analog Channel 6 (slew rate detection time constant,
Analog Channel 2 (operating mode, see adc_config
D
Analog Channel 0 (vout_max: maximum allowed
FIGURE 9. Equivalent Input Circuit
A
– 0.5V (min) while the output low voltage is 0.4V
= VDDA – VSSA. They are not prone to latch-
over temperature input to IC
see adc config worksheet)
Reserved for future use.
Reserved for future use.
Bit Field Description
Bit Field Description
output voltage)
worksheet)
current)
D
. The output high
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30134309
D
, where