sm72240mfx-4.63 National Semiconductor Corporation, sm72240mfx-4.63 Datasheet - Page 7

• Manufacturer Part Number: sm72240mfx-4.63
• Description: Solarmagic 5-pin Microprocessor Reset Circuit
• Manufacturer: National Semiconductor Corporation

Circuit Information
RESET OUTPUT
The reset input of a µP initializes the device into a known
state. The SM72240 microprocessor voltage monitoring cir-
cuit asserts a forced reset output to prevent code execution
errors during power-up, power-down, and brownout condi-
tions.
RESET is guaranteed valid for V
the reset threshold, an internal timer maintains the output for
the reset timeout period. After this interval, reset goes high
and the microprocessor initializes itself into a known state.
RESET is active low.
As V
brownout), the reset activates (see the Negative-Going V
Transients section). When V
threshold, the internal timer starts. Reset holds until V
ceeds the reset threshold for longer than the reset timeout
period. After this time, reset releases.
Additionally, the Manual Reset input (MR) will initiate a forced
reset. See the Manual Reset Input section.
The SM72240 reset output ignores short duration glitches on
V
tails.
RESET THRESHOLD
The SM72240 is available with a reset voltage of 4.63V or
3.08V which are suitable for monitoring 5.0V or 3.3V supplies
respectively.
MANUAL RESET INPUT (MR)
Many µP-based products require a manual reset capability,
allowing the operator to initiate a reset. The MR input is fully
debounced and provides an internal 22 kΩ pull-up. When the
MR input is pulled below V
reset is asserted after a typical delay of 2 µs. Reset remains
active as long as MR is held low, and releases after MR rises
above V
digital logic to assert reset or to daisy chain supervisory cir-
cuits.
Applications Information
BENEFITS OF PRECISION RESET THRESHOLDS
A microprocessor supply supervisor must provide a reset out-
put within a predictable range of the supply voltage. A com-
mon threshold range is between 5% and 10% below the
nominal supply voltage. The SM72240 uses highly accurate
CC
and MR. See the Applications Information section for de-
CC
IH
drops below the reset threshold (such as during a
and the reset timeout period expires. Use MR with
IL
(0.25V
CC
again rises above the reset
CC
CC
≥
1V. Once V
) for more than 100 ns,
CC
exceeds
CC
ex-
CC
7
circuitry to ensure that the reset threshold occurs only within
this range (for 5.0V and 3.3V supplies).
the standard reset threshold applies to 5.0V and 3.3V nominal
supply voltages.
ENSURING A VALID RESET OUTPUT DOWN TO V
When V
able to sink the rated current. A high-impedance CMOS logic
input connected to RESET can therefore drift to undetermined
voltages. To prevent this situation, a 100kΩ resistor should
be connected from the RESET output to ground, as shown in
Figure
OPEN DRAIN OUTPUT
An open drain output allows easy paralleling of multiple mi-
croprocessor reset circuits without requiring additional logic
gates. Open drain outputs also allow interfacing devices of
differing logic levels or families, since the output pull-up re-
sistor may be connected to any supply voltage up to 5.5V,
regardless of V
The pull up resistor is calculated so that maximum current flow
into RESET is less than 10 mA when activated. The resistor
must be small enough so that the leakage current of all con-
nected devices does not create an excessive voltage drop
when the output is not activated. A resistor value of 100 kΩ
will generally suffice.
Threshold
FIGURE 1. Circuit for RESET Valid from V
4.63 ± %
3.08 ± %
Reset
1.
CC
TABLE 1. Monitored Tolerance Table
falls below 1V, the SM72240 RESET output is un-
CC
.
91.8–95.2%
3.3V
Supply Voltage
Table 1
90.8-94.4%
30141410
5.0V
www.national.com
CC
shows how
= 0V
CC
= 0V