cyrf6936 Cypress Semiconductor Corporation., cyrf6936 Datasheet
cyrf6936
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cyrf6936 Summary of contents
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... Applications Support See www.cypress.com designs, and application notes. Functional Description The CYRF6936 WirelessUSB™ LP radio is a second gener- ation member System-On-Chip (SoC) family. The CYRF6936 is interop- erable with the first generation CYWUSB69xx devices. The CYRF6936 IC adds a range of enhanced features, including ...
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... Decoupling pin for 1.8V logic regulator, connect through a 0.47 μF capacitor to GND V = 1.8V to 3.6V. Main supply BAT V = 2.4V to 3.6V. Typically connected I/O interface voltage, 1.8–3.6V I Must be connected to GND NC Connect to GND Ground Ground Figure 1. CYRF6936, 40 QFN – Top View CYRF6936 Top View* XTAL 1 30 PACTL / GPIO NC 2 XOUT / GPIO MISO / GPIO ...
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... In addition, the CYRF6936 IC has a Power Management Unit (PMU), which allows direct connection of the device to any battery voltage in the range 1.8V to 3.6V. The PMU conditions the battery voltage to provide the supply voltages required by the device, and may supply external devices ...
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... DDR mode. Similarly, the 15.675 kbps mode is supported by selecting 64 chip SDR mode. In this way, a suitably configured CYRF6936 IC device may transmit data to or receive data from a first generation device, or both. Backwards compatibility requires disabling the SOP, length, and CRC16 fields. ...
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... DSSS PN codes, data rate, operating mode, interrupt masks, interrupt status, and so on. SPI Interface The CYRF6936 IC has an SPI interface supporting communi- cations between an application MCU and one or more slave devices (including the CYRF6936). The SPI interface supports single-byte and multi-byte serial transfers using either 4-pin or 3-pin interfacing ...
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... Figure 7. SPI Single Write Sequence data from mcu data from mcu CYRF6936 Byte 1+N [7:0] Data data to mcu 1 data from mcu 1 Page [+] Feedback ...
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... Descriptions” on page 12. The CYRF6936 IC features three sets of interrupts: transmit, receive, and system interrupts. These interrupts all share a single pin (IRQ), but can be independently enabled/disabled. The contents of the enable registers are preserved when switching between transmit and receive modes ...
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... Figure 9. Recommended Circuit for Systems Where V 0402 0402 0402 0402 0402 Document #: 38-16015 Rev. *G May Fall Below 2.4V BAT 2 1 0402 0402 0402 VDD 35 VCC3 16 VCC2 7 VCC1 3 E-PAD 41 VREG 40 VIO GND1 33 12 VBAT0 38 VBAT1 6 VBAT2 8 VDD1 VSS1 5 24 VDD2 VSS2 27 44 CYRF6936 Page [+] Feedback ...
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... Panasonic - ECG SMD RES CHIP 5.11 OHM 1/16W 1% 0603 Yageo America SMD RES 1.00 OHM 1/8W 1% 0805 SMD Yageo IC, LP 2.4 GHz RADIO SoC QFN-40 Cypress Semiconductor CYRF6936 Rev A5 IC WIRELESS MICROCONTROL- Cypress Semiconductor CY7C60323-PVXC LER SSOP28 CRYSTAL 12.00MHZ HC49 SMD eCERA PRINTED CIRCUIT BOARD ...
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... Figure 10. Recommended Circuit for Systems Where 0402 0402 VDD 35 VCC3 16 VCC2 7 VCC1 3 VREG 40 VIO 33 VBAT0 38 VBAT1 6 VBAT2 8 0402 VCC 11 Document #: 38-16015 Rev 2.4V to 3.6V (PMU disabled) BAT 0402 E-PAD 41 GND1 12 VSS 8 0402 CYRF6936 Page [+] Feedback ...
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... RES CHIP 620 OHM 1/16W 5% 0402 Panasonic - ECG SMD SWITCH LT 3.5MMX2.9MM 160GF Panasonic - ECG SMD IC, LP 2.4 GHz RADIO SoC QFN-40 Cypress Semiconductor CYRF6936 Rev A5 IC LOW-SPEED USB ENCORE II Cypress Semiconductor CY7C63803-SXC CONTROLLER SOIC16 CRYSTAL 12.00MHZ HC49 SMD eCERA PRINTED CIRCUIT BOARD ...
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... ABORT EN RSVD RSVD RSVD AUTO_CAL_TIME AUTO_CAL_OFFSET RSVD RSVD RSVD RSVD RSVD TX Buffer File RX Buffer File SOP Code File Data Code File Preamble File MFG ID File CYRF6936 [ Default Access -1001000 -bbbbbbb 00000000 bbbbbbbb TXC TXE 00000011 bbbbbbbb IRQEN IRQEN --000101 ...
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... Document #: 38-16015 Rev. *G CHANNEL_ADR R/W R/W R/W Channel R/W R/W R/W TX Length TX_CTRL_ADR R/W R/W R/W TXB15 TXB8 TXB0 IRQEN IRQEN IRQEN CYRF6936 Address 0x00 R/W R/W R/W Address 0x01 R/W R/W R/W Address 0x02 R/W R/W R/W TXBERR TXC TXE IRQEN ...
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... R/W R/W R/W Data Code Length Data Mode TXB15 IRQ TXB8 IRQ TXB0 IRQ is below the LVI threshold (see PWR_CTL_ADR). This BAT CYRF6936 Address 0x03 R/W R/W R/W PA Setting Address 0x04 TXBERR IRQ TXC IRQ TXE IRQ ...
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... Packet Reception Complete Interrupt Enable. See RX_IRQ_STATUS_ADR for description. Bit 0 Receive Error Interrupt Enable. See RX_IRQ_STATUS_ADR for description. Document #: 38-16015 Rev. *G RX_CTRL_ADR R/W R/W R/W RXB16 RXB8 RXB1 IRQEN IRQEN IRQEN CYRF6936 Address 0x05 R/W R/W R/W RXBERR RXC RXE IRQEN IRQEN IRQEN Page [+] Feedback ...
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... Valid Flag Enable. When this bit is set, the receive buffer can store up to eight bytes of data. Typically, this bit is set only when interoperability with first generation devices is desired. See RX_BUFFER_ADR for more detail. Document #: 38-16015 Rev. *G RX_CFG_ADR R/W R/W R/W ATT HILO FAST TURN EN CYRF6936 Address 0x06 R/W R/W Not Used RXOW EN VLD EN Page [+] Feedback ...
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... The exact cause of the error may be determined by reading RX_STATUS_ADR. This bit is cleared when this register is read. Document #: 38-16015 Rev RXB16 IRQ RXB8 IRQ RXB1 IRQ CYRF6936 Address 0x07 RXBERR IRQ RXC IRQ RXE IRQ ...
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... EOP ERR CRC0 Bad CRC RX_COUNT_ADR Count Length CYRF6936 Address 0x08 Code RX Data Mode Address 0x09 Address 0x0A ...
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... LVI is triggered 1.8V 2.0V; BAT is never less than this voltage, provided that the total load on the REG BAT . R XSIRQ EN Not Used Not Used CYRF6936 Address 0x0B R/W R/W R/W LVI TH PMU OUTV voltage BAT is greater than the specified minimum value. Address 0x0C ...
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... IRQ Input. The state of this bit reflects the voltage on the IRQ pin. Document #: 38-16015 Rev. *G IO_CFG_ADR R/W R/W R/W MISO OD XOUT OD PACTL R/W R/W R PACTL OP IRQ OP XOUT IP CYRF6936 Address 0x0D R/W R/W R/W PACTL GPIO SPI 3PIN IRQ GPIO pin voltage. IO pin voltage. IO pin voltage. IO pin voltage. IO Address 0x0E 2 1 ...
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... When SOP LEN is set, all 5 bits of this field are used. When SOP LEN is cleared, the most significant bit is disregarded. Typical applications configure SOP TH = 04h for SOP32 and SOP TH = 0Eh for SOP64. Document #: 38-16015 Rev. *G XACT_CFG_ADR R/W R/W R/W FRC END END STATE R/W R/W R/W LEN EN CYRF6936 Address 0x0F R/W R/W R/W ACK TO Address 0x10 R/W R/W R/W SOP TH ...
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... LNA stage. Document #: 38-16015 Rev R/W Not Used Not Used R/W R/W Not Used RSSI_ADR LNA CYRF6936 Address 0x11 R/W R/W R/W TH32 Address 0x12 R/W R/W R/W TH64 Address 0x13 ...
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... R/W R/W R/W HINT R/W R/W R/W CRC SEED LSB R/W R/W R/W CRC SEED MSB CRC LSB CYRF6936 Address 0x14 R/W R/W R/W EOP Address 0x15 R/W R/W R/W Address 0x16 R/W R/W R/W Address 0x17 ...
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... CRC MSB CRC LSB CRC MSB STRIM LSB CYRF6936 Address 0x18 Address 0x19 Address 0x1A ...
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... R/W Not Used Not Used FRC SEN FRC AWAKE R/W R/W R/W MAN RXACK FRC RXDR DIS CRC0 CYRF6936 Address 0x1C R/W R/W R/W STRIM MSB Address 0x1D Not Used Not Used RST Address 0x1E ...
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... R/W RSVD MAN TXACK OVRD ACK XTAL_CFG_ADR RSVD RSVD START DLY RSVD RSVD RSVD CYRF6936 Address 0x1F R/W R/W R/W DIS TXCRC RSVD TX INV Address 0x26 RSVD RSVD RSVD Address ...
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... RSVD RX_ABORT_ADR ABORT EN RSVD RSVD AUTO_CAL_TIME AUTO_CAL_OFFSET CYRF6936 Address 0x28 RSVD RXF RSVD Address 0x29 RSVD RSVD RSVD Address 0x32 ...
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... The seven LSBs contain the number of erroneous chips received for the data. Document #: 38-16015 Rev RSVD RSVD RSVD TX_BUFFER_ADR 16 Bytes RX_BUFFER_ADR 16 Bytes CYRF6936 Address 0x39 RSVD RX INV ALL SLOW Address 0x20 R/W W ...
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... When reading this file, all three bytes must be read; if fewer than three bytes are read from the file, the contents of the file will have been rotated by the number of bytes read. This also applies to writes. Do not access or modify this register during Transmit or Receive. Document #: 38-16015 Rev. *G SOP_CODE_ADR 8 Bytes 0x17FF9E213690C782 DATA_CODE_ADR 16 Bytes PREAMBLE_ADR 3 Bytes 0x333302 CYRF6936 Address 0x22 R/W R/W Address 0x23 R/W R/W Address 0x24 R/W ...
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... To minimize ~190 μA of current consumption (default), execute a “dummy” single-byte SPI write to this address with a zero data stage after the contents have been read. Non-zero to enable reading of fuses. Zero to disable reading fuses. Document #: 38-16015 Rev. *G MFG_ID_ADR 6 Bytes NA CYRF6936 Address 0x25 R R Page ...
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... XOUT disabled (–5 dBm dBm (+4 dBm) LNA off, ATT on LNA on, ATT off V = 2.5V 2.73V, BAT REG LOAD to inputs through a series resistor limiting input current to 1 mA. AC timing not guaranteed. . BAT . IO CYRF6936 [6] ................................. 1100V Min Typ Max Unit 1.8 3.6 V 2.4 2.43 V 2.7 2.73 V 1.8 3.6 V [9] 2 ...
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... Document #: 38-16015 Rev. *G (continued) Conditions V = 1.8V 2.73V, BAT REG 0–50°C, RX Mode V = 1.8V 2.73V, BAT REG 50–70°C, RX Mode Description Figure 11. SPI Timing t SCK_CYC t SCK_LO t DAT_VAL . IO CYRF6936 Min Typ Max Unit Min Typ Max Unit 238.1 ns 100 ns 100 ...
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... ResBW 100 kHz ResBW 100 kHz ResBW Seven steps, monotonic PN Code Pattern 10101010 PN Code Pattern 11110000 >0 dBm –6 dBc, 100 kHz ResBW CYRF6936 Min Typ Max Unit 2.400 2.497 GHz –97 dBm –93 dBm –80 – ...
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... Min XSIRQ Slow channels Medium channels Fast channels GFSK 250 kbps 125 kbps <125 kbps <60 ppm crystal-to-crystal all modes except 64-DDR <60 ppm crystal-to-crystal 64-DDR CYRF6936 Typ Max Unit –38 dBm –34 dBm –47 dBm –43 dBm –48 dBm – ...
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... Vcc Receiver Sensitivity vs Channel (3.0v, Room Temp) -81 GFSK -83 -85 CER -87 -89 -91 DDR32 -93 8DR32 - Channel CYRF6936 Transmit Power vs. Channel 6 PA7 4 2 PA6 PA5 -6 -8 -10 PA4 -12 - Channel Average RSSI vs. Vcc (Rx signal = -70dBm ...
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... TEMPERATURE (C) ICC TX @ PA3 19 3.3V 18.5 3.0V 2.7V 18 2.4V 17.5 17 16 TEMPERATURE (C) CYRF6936 GFSK vs. BER (SOP Threshold = 5, C38 slow) 100 10 1 0.1 0.01 0.001 0.0001 GFSK 0.00001 -100 -80 -60 -40 -20 0 Input Power (dBm) ICC RX SYNTH 9 ...
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... INCLUDING JIG AND Typical SCOPE V Unit CC 90% Ω 10% Ω GND Ω Rise time: 1 V/ns V THÉVENIN EQUIVALENT Equivalent to OUTPUT Package Name Package Type 40 QFN 40 Quad Flat Package No Leads Lead-Free CYRF6936 ICC TX @ PA7 40.5 40 3.3V 39.5 3.0V 39 38.5 2.7V 38 2.4V 37.5 37 36.5 36 35.5 35 34.5 34 33 ...
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... Cypress against all charges. SIDE VIEW 0.08[0.003] 1.00[0.039] MAX. C 0.05[0.002] MAX. 0.80[0.031] MAX. 0.20[0.008] REF. 2.8 0°-12° 0.30[0.012] 0.50[0.020] C SEATING PLANE CYRF6936 BOTTOM VIEW 2.8 0.18[0.007] 0.28[0.011] PIN1 ID N 0.20[0.008 0.45[0.018] SOLDERABLE EXPOSED PAD 0.24[0.009] (4X) 0 ...
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... Document History Page Description Title: CYRF6936 WirelessUSB™ LP 2.4 GHz Radio SoC Document Number: 38-16015 REV. ECN NO. Issue Date ** 307437 See ECN *A 377574 See ECN *B 398756 See ECN *C 412778 See ECN *D 435578 See ECN *E 460458 See ECN *F 487261 See ECN Document #: 38-16015 Rev. *G Orig ...
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... Description Title: CYRF6936 WirelessUSB™ LP 2.4 GHz Radio SoC Document Number: 38-16015 *G 778236 See ECN OYR/ARI -modified radio function register descriptions Document #: 38-16015 Rev. *G -changed L/D pin description -footnotes added -changed RST Capacitor from 0.1uF to 0.47 uF -updated Figure 9, Recommended Circuit for Systems -updated Table 3, Recommended bill of materials for systems ...