cs98200-cr Cirrus Logic, Inc., cs98200-cr Datasheet
cs98200-cr
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cs98200-cr Summary of contents
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... DVD application … today. Need to get your product to market quickly? Cirrus' Total Entertainment platform solutions include DVD front-end controllers, MPEG encoders, audio DSPs, and digital power amplifiers … everything you need to launch your product before the competition. CS98200 is a page 60. Cirrus specifically electronics ...
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... CS98200 Next Generation DVD Processor OVERVIEW (cont.) Here is a summary of the CS98200 features. System Characteristics • Dual 32-bit (180 MHz) RISC processors • 32-bit DSP processor ~ 180 MIPS • 240-pin MQFP package • All I/O pins are 3 V with 5 V tolerance • Advanced 0.18 µ CMOS technology • ...
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... igital Encoding Video Mixing Line B uffer Main V ideo Scaling and D isplay O n Screen D isplay O verlay Picture in P icture O verlay G rap h ics Line B uffer / F licker F ilter Main G raphics CS98200 3 ...
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... Audio Input Interface Timing ............................................................................... 22 2.2.9 Audio Output Interface Timing ............................................................................. 23 2.2.10 Miscellaneous Timings ...................................................................................... 24 3. TYPICAL APPLICATION ........................................................................................................ 25 4. CS98200 DEVICE SUMMARY ................................................................................................ 26 4.1 Block Diagram .................................................................................................................. 26 Contacting Cirrus Logic Support pro estio iries con tact a C irrus ales R e pre se ntative . ...
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... CS98200 Device Details .................................................................................................. 26 4.2.1 RISC-32 Processors ........................................................................................... 26 4.2.2 Powerful 24/32-Bit DSP ...................................................................................... 26 4.2.3 System Controls .................................................................................................. 26 4.2.4 Memory Controller .............................................................................................. 26 4.2.5 Data Flow Engine ................................................................................................ 27 4.2.6 MPEG Video Decoder ......................................................................................... 27 4.2.7 System Synchronization ..................................................................................... 27 4.2.8 Audio Interface .................................................................................................... 27 4.2.9 Video Input .......................................................................................................... 27 4.2.10 External Interface .............................................................................................. 27 4.2.11 Video Processor ................................................................................................ 27 4.2.12 Sub-Picture Processor ...................................................................................... 27 4.2.13 Graphics Engine ............................................................................................... 27 4.2.14 On Screen Display Module ............................................................................... 28 4.2.15 DVD Loader Interface ....................................................................................... 28 4.2.16 CPU Interface and SRAM Controller ................................................................ 28 4 ...
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... Figure 9. SDRAM Burst Write Transaction.................................................................................... 16 Figure 10. SDRAM Burst Read Transaction.................................................................................. 17 Figure 11. SDRAM Timing............................................................................................................. 17 Figure 12. ROM/NVRAM Reading Timing ..................................................................................... 18 Figure 13. ROM/NVRAM Write Timing.......................................................................................... 19 Figure 14. CS98200 Digital Video Interface Timing Diagram ........................................................ 20 Figure 15. Video Input Timing ....................................................................................................... 21 Figure 16. Audio Input Timings...................................................................................................... 22 Figure 17. Digital Audio Out Timing Diagram ................................................................................ 23 Figure 18. Miscellaneous Timings ................................................................................................. 24 Figure 19 ...
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... Table 24. UART Interface Pins ..................................................................................................... 55 2 Table 25 Interface Pins.......................................................................................................... 55 Table 26. Miscellaneous Interface Pins ........................................................................................ 55 Table 27. Power and Ground ........................................................................................................ 56 Table 28. Acronyms and Abbreviations ........................................................................................ 58 Table 29. Units of Measurement ................................................................................................... 59 Table 30. Pin Description Conventions ......................................................................................... 60 DS581PP2 Copyright 2002 Cirrus Logic (All Rights Reserved) CS98200 Next Generation DVD Processor 7 ...
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... AMB P Total Power consumption total CAUTION: Operating beyond these Minimum and Maximum limits can result in permanent dam- age to the device. Cirrus Logic recommends that CS98200 devices operate at the settings described in the next table. RECOMMENDED OPERATING CONDITIONS 1.1.2 Parameter Supply Voltage, Analog and IO ...
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... Only applies to each set of three DACs. 3. RLoad is a double terminated load, which includes a 75 DS581PP2 DG DP SNR AM PM resistor at the video DAC and a 75 Copyright 2002 Cirrus Logic (All Rights Reserved) CS98200 Next Generation DVD Processor resistor at the video monitor. ...
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... CS98200 Next Generation DVD Processor 2. TIMINGS 2.1 Timing Diagram Conventions This data sheet contains timing diagrams. The following key explains the components used in these diagrams. Any variations are clearly labeled when they occur. Therefore, no additional meaning should be attached unless specifically stated ...
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... DC CHARACTERISTICS (T = 25° =1.8V±10%, V PLL DD A 2.2.1 ATAPI Interface CS98200 can interface with a ATAPI-type slave loader gluelessly. transaction and a write ATAPI transaction. Symbol t 1 Cycle Time acyc t Address Valid to HMRD-/HMWR- Setup aavr t Address Hold from HMRD-/HMWR Setup H_RD/H_WR Pulse Width ...
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... CS98200 Next Generation DVD Processor 2.2.2 DVD Loader Interface Symbol t DVDL_CK Period dlckper t DVDL_DI Setup Time dldisu t DVDL_DI Hold Time dldih t DVDL_DO Output Delay from Falling dldod Edge t DVD_STB Width dlstbwd t DVD_STB Low Time dlstbl t DVD_STB High Time dlstbh t DVD_RDY Output Delay ...
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... Figure 5. DVD Loader CD Interface DS581PP2 lso sh Figure 4. DVD Loader Data Interface t lrcksu t t cddsu cddh t t c2posu c2poh Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor t d lstbw lstbl d lstbh CS98200 13 ...
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... CS98200 Next Generation DVD Processor Invalid Lower (Left Channel 32-bit First, Rig ht Chan nel L ow, C2P irst latch tim ing high ...
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... D VD S_V S_S O S (Input) DS581PP2 Description t dsckper t t dsckl dsckh t dsdsu t dscdsu Figure 7. DVD Serial Interface Timing Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor Min Typ Max Unit dsdhd t dscdhd CS98200 15 ...
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... CS98200 Next Generation DVD Processor 2.2.4 SDRAM Interface CS98200 interfaces with either SDRAM or SGRAM for high data bandwidth transfer. the refresh cycle performed by CS98200. Symbol t Output Delay from M_CKO active edge mco t M_CKO Period mper t M_D[31:0] delay from M_CKO mdow t M_D[31:0] setup to M_CKO ...
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... M_D[31:0](READ) DS581PP2 mco t msur Figure 11. SDRAM Timing Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor mper t mdow t mhr CS98200 ...
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... CS98200 Next Generation DVD Processor 2.2.5 ROM/NVRAM Interface Symbol t Read Cycle Time Data Setup cds Data Setup ods t Address to Data Setup ads t Address to WE setup (Write) aws setup (Write) cws t WE Pulse Width (Write Data Output (Write) ...
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... r DS581PP2 cws cdo Figure 13. ROM/NVRAM Write Timing Copyright 2002 Cirrus Logic (All Rights Reserved) CS98200 Next Generation DVD Processor ...
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... It is recommanded that the output data should be taken at the opposite edge of the CLK27_O ut_ utp ut ut_ D 7 utp ut ut_ t_V S (O utp ut) Figure 14. CS98200 Digital Video Interface Timing Diagram 20 Description t vocper Copyright 2002 Cirrus Logic (All Rights Reserved) Min ...
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... Table 5. Video Input Interface Symbols and Characterization Data . [7- _VS DS581PP2 t vicper t t sutc1 hvi t sutc2 Figure 15. Video Input Timing Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor Min Typ Max Unit 37.037 CS98200 21 ...
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... CS98200 Next Generation DVD Processor 2.2.8 Audio Input Interface Timing Symbol AUDI_BCK Low Time aicl AUDI_BCK High Time aich AUDI_BCK period aiper t AUDI_LR setup time lrts t AUDI_D setup time sdsus t AUDI_D hold time sdhs Table 6. Audio Input Interface Symbols and Characterization Data 1 ...
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... Table 7. Digital Audio Out Characteristics t axch t t lrds t adsm Figure 17. Digital Audio Out Timing Diagram Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor Min Typ Max Unit 104 - axper t axcl sdm t aoperl CS98200 23 ...
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... CS98200 Next Generation DVD Processor 2.2.10 Miscellaneous Timings Symbol t 1 XTLCLK period xccper t RST_N Low Pulse Width rstl t GPIO PW High gph t GPIO PW Low gpl 1. XTLCLK must meet the requirement of external the video encoder for correct chroma (27 MHz XTLCLOCK RESET-N 24 Description Table 8. Miscellaneous Timing Characteristics ...
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... TYPICAL APPLICATION The Figure 19 shows a typical example of a complete DVD Receiver solution using the CS98200. Rem ote .. K eybo ard . IR Con trol . dio dio ide ...
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... CS98200 Next Generation DVD Processor 4. CS98200 DEVICE SUMMARY 4.1 Block Diagram The CS98200 block diagram is shown in 4.2 CS98200 Device Details 4.2.1 RISC-32 Processors • Two Powerful 32-bit RISC processors (RISC0 and RISC1), Generation III • Virtual memory support • Optimizing C compiler • Big or little endian data formats support • ...
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... Progressive and interlaced mode support Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor Video Input External Interface 2 ® C master and slave port Video Processor Sub-Picture Processor Graphics Engine CS98200 27 ...
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... CS98200 Next Generation DVD Processor • Supports gamma correction • Color-key type transparency support • Global blending support • Frame buffer wrap around support for scrolling • 3 tap horizontal and vertical filtering 4.2.14 On Screen Display Module • Supports 2-bit and 4-bit pixel modes • ...
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... The DRAM Interface sup- ports Mbytes. For a typical DVD player application, CS98200 requires 8 Mbytes memo- ry space. Sharing the same interface, CS98200 also sup- ports FLASH ROM, OTP, or mask ROM inter- face. Code is stored in ROM. After the system is booted, the code is shadowed inside SDRAM for execution ...
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... DVD loader operation, which may also be configured to connect without external glue logic. 30 5.7 Serial DVD Interface The CS98200 has a 4-pin serial port which inter- faces to the data port of popular low-cost DVD 2 loaders. This type of loader provides for low C 2 system cost by eliminating the track buffer, in- ...
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... KHz. The audio inter- face also includes a flexible audio input interface, which can input a wide range of pro- tocols from an audio ADC or an IEC-958 receiv KHz. DS581PP2 functions. Copyright 2002 Cirrus Logic (All Rights Reserved) CS98200 Next Generation DVD Processor 31 ...
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... The video filters should be locat close as possible to the video connectors. Two schottky diodes should be connected to each output in order to protect the CS98200 from surges caused by being connected and dis- connected to the external devices. shows the video DAC connections. ...
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... Video Input/Output Interface In addition to the six 10-bit video DACs, the CS98200 provides a separate Digital Video In- terface that will give you flexible and powerful means of outputting digital video data to exter- nal devices in CCIR601/3 and CCIR656 formats. The interface directly supports NTSC/PAL vid- eo encoding, in both master and slave synchro- nization configurations ...
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... Figure 22 shows RXD and TXD data trans- fers over the UART interface. The CS98200 has 2 UART interfaces based on a NS16550-compatible design, which incorpo- rates 16-byte transmit and receive FIFOs to en- hance performance and throughput. As with the 16650, it can operate in both FIFO-mode (16550 the original non-FIFO mode (16450) ...
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... MEMORY MAP 6.1 Processor Memory Map The CS98200 externally supports Mbytes DRAM and 16 Mbytes ROM/NVRAM. Table 10, and Table 11 on the next page list the memory map as viewed by the RISC processors, and identifies whether each segment is mapped or cacheable. For detailed information on programming CS98200 memory, see CS98200 Memory Interface User’s Manual (DS525UMD1) ...
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... AUDO _D_0 235 S PDIF_O DVD_S TB 236 237 DVD_EN A 238 DVD_SO S 239 DVD_ER R 240 PLL_GN D 36 CS98200 240-Pin MQFP Figure 23. 240-Pin MQFP Pin Layout Copyright 2002 Cirrus Logic (All Rights Reserved) 120 PLL_1V8 119 DV DL_CK 118 DV DL_DO 117 DV DL_DI 116 DV D_RDY 115 ...
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... MQFP Pin Summary Figure 24 shows the pin names associated with each type of CS98200 interface ...
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... MQFP Pin Assignments Table 14 lists the pin number, pin name, and pin type for the 240-pin CS98200 package. The primary function and pin direction is shown for all signal pins. For some signal pins, a secondary function (or functions) and direction are also shown. For pins having more than one function, the primary function is chosen when the chip is reset ...
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... Next Generation DVD Processor Secondary Function(s) NVRAM Address[23] NVRAM Address[22] NVRAM Address[21] NVRAM Address[20] NVRAM Address[19] NVRAM Address[18] NVRAM Address[17] NVRAM Address[16] NVRAM Address[15] NVRAM Address[14] NVRAM Address[13] NVRAM Address[12] NVRAM Address[11] CS98200 Dir ...
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... CS98200 Next Generation DVD Processor Pin # Pin Name Type 42 M_D_10 B8 43 IO_GND Gnd 44 DIG_GND Gnd 45 M_D_9 B8 46 DIG_1V8 Pwr 47 M_D_8 B8 48 M_D_7 B8 49 M_D_6 B8 50 M_D_5 B8 51 M_D_4 B8 52 IO_GND Gnd 53 M_D_3 B8 54 IO_3V3 Pwr 55 M_D_2 B8 56 M_D_1 B8 57 VIN_D_0 B4 58 ...
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... Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor Secondary Function(s) NVRAM_WE_N NVRAM Address[10] NVRAM Address[9] NVRAM Address[8] NVRAM Address[7] NVRAM Address[6] NVRAM Address[5] NVRAM Address[4] NVRAM Address[3] NVRAM Address[2] NVRAM Address[1] NVRAM Address[0] CS98200 Dir ...
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... CS98200 Next Generation DVD Processor Pin # Pin Name Type 102 VIN_D_4 B4 103 VIN_D_5 B4 104 VIN_D_6 B4 105 IO_3V3 Pwr 106 VIN_D_7 B4 107 SCL1 B4SU 108 SDA1 B4SU 109 SCL2 B4SU 110 SDA2 B4SU 111 TXD_1 B4 112 RXD_1 B4 113 TXD_2 B4 114 RXD_2 B4 115 ...
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... Primary Video_Out Data[6] (1.) Secondary DVD Data[7] (2.) GPIO_HST[7] (3.) Primary Host Slave Data[7] (4.) Primary Video_Out Data[7] (1.) Secondary DVD Control Clock (2.) GPIO_HST[8] (1.) Secondary DVD Control Ready (2.) GPIO_HST[9] (1.) Secondary DVD Control Data Out (2.) GPIO_HST[10] (1.) Secondary DVD Control Data In (2.) GPIO_HST[11] CS98200 Dir ...
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... CS98200 Next Generation DVD Processor Pin # Pin Name Type 140 H_D_12 B4 141 H_D_13 B4S 142 H_D_14 B4 143 H_D_15 B4 144 CD_BCLK B4S 145 CD_LRCK B4 146 CD_DATA B4 147 CD_C2P0 B4 148 DAC_AGND Gnd 149 DAC_D1V8 Pwr 150 DAC_DGND Gnd 151 C_OUT Anlg 152 DAC_A3V3 ...
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... Primary Host Slave Address[3] GPIO_HST[20] (1.) Secondary Video_In Data[2] (2.) GPIO_DVD[2] (3.) Secondary Host Slave Data[2] (1.) Secondary Video_In Data[3] (2.) GPIO_DVD[3] (3.) Secondary Host Slave Data[3] (1.) Secondary Video_In Data[4] (2.) GPIO_DVD[4] (3.) Secondary Host Slave Data[4] (1.) Secondary Video_In Data[5] (2.) GPIO_DVD[5] (3.) Secondary Host Slave Data[5] CS98200 Dir ...
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... CS98200 Next Generation DVD Processor Pin # Pin Name Type 184 DVD_D_6 B4 185 DVD_D_7 B4 186 H_CS_0 B4 187 H_CS_1 B4 188 IO_3V3 Pwr 189 H_CS_2 B4 190 IO_GND Gnd 191 H_CS_3 B4 192 H_RD B4 193 H_WR B4 194 H_RDY B4S 195 SPI_CLK B4S 196 SPI_DO B4 197 SPI_DI ...
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... Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor Secondary Function(s) (1.) Clock_Monitor_CPU (2.) Host ParSlave_Set (1.) Clock_Monitor_DRC (2.) GPIO_MIS[11] PCM MCLK External Input (1.) System Clock External Input (2.) GPIO_MIS[12] (1.) CPU clock External Input (2.) GPIO_MIS[13] (1.) Aud_PLL_AUX_FIN[1] (2.) GPIO_MIS[14] (1.) Main_Clock_Monitor (2.) HostSlave_Par_I2C_Sel CS98200 Dir ...
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... CS98200 Next Generation DVD Processor Pin # Pin Name Type 235 SPDIF_O B4 236 DVD_STB B4S 237 DVD_ENA B4 238 DVD_SOS B4 239 DVD_ERR B4 240 PLL_GND Gnd Table 14. 240-Pin MQFP Pin Assignments (Continued) 48 Primary Function Dir SPDIF O Primary DVD Data Strobe I Primary DVD Data Enable ...
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... INTERFACE DESCRIPTIONS 8.1 SDRAM Interface Pins These pins are used to interface the CS98200 with some external SDRAM. The CS98200 can interface with SDRAM of various sizes. Only 32-bit data width is supported. Follow the instructions how to interface with any particular configuration of SDRAM. Pin ...
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... NV_CE_N 8.3 Video Output Interface Pins This is the interface to a video encoder chip that will send the CS98200 video signals to a TV. See Table 17. This interface uses the same pins of the Video Input Interface, so you are not able to use Video Input (primary) and Video Output (Secondary) at the same time. . ...
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... O Audio Serial Data Out[3]. O S/PDIF Output I Audio Input Bit Clock. The CS98200 can be programmed to use the Audio Output function’s internally generated bit clock, in which case this pin is not required. I Audio Input Left/Right Clock. The CS98200 can be pro- grammed to use the Audio Output function’s internally gen- erated LR clock, in which case this pin is not required ...
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... CS98200 Next Generation DVD Processor 8.6 Host Master/ATAPI Interface Pin Signal Name 186, 187, 189, H_CS[3:0] 191 177 H_ALE 192 H_RD 193 H_WR 194 H_RDY 170, 172, 173, H_A[3:0] 176 123, 124, 125, H_D[15:0] 126, 127, 133, 134, 135, 136, 137, 138, 139, ...
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... This interface connects to standard DVD loaders, and consists of three parts: Control, DVD Data and CD Data. (See Table 21.) This interface shares CS98200 pins with the Host Master/ATAPI interface. (See Table 20 on page 52.) The definition of the pins is set via register programming, and the two modes are mutually exclusive ...
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... General Purpose Input/Output (GPIO) The CS98200 provides enough GPIO pins, each with individual output High-Z-state controls. High- Z-state means that the output driver is turned off or placed in the high-impedance state. describes the General Purpose I/O Interface. Additional pins may also be re-defined as GPIOs. ...
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... UART Interface Pins The CS98200 has two 16550-type UARTs for RS-232 serial communications, both of which have two 16-byte FIFOs for receiving and transmitting data. Pin Signal Name 111 TXD_1 112 RXD_1 113 TXD_2 114 RXD_2 2 8. Interface 2 The I C pins are used for both master and slave mode. ...
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... Next Generation DVD Processor 8.14 Power and Ground The CS98200 requires 4 different types of power supplies – PLLs, digital, analog, and IO pins -. The PLLs and digital power use 1.8 V power supply. The IO pins and digital power use 3.3 V power sup- ply, and are 5 V input tolerant. (See ...
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... Ejector pin marks in molding are present on every package. 7) Drawing above does not reßect exact package pin count. DS581PP2 34.35 34.85 31.90 32.10 Pin 1 Indicator Figure 25. 240-Pin MQFP Package Drawing Copyright 2002 Cirrus Logic (All Rights Reserved) Next Generation DVD Processor 0.10 0.30 31.90 32.10 3.20 3.60 0 MIN 7 MAX 0.25 MIN ab le dambar protrusion of 0.08 mm CS98200 57 ...
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... CS98200 Next Generation DVD Processor 10. CONVENTIONS This section presents acronyms, abbreviations, units of measurement, and conventions used in this data sheet. 10.1 Acronyms and Abbreviations Table 28 lists abbreviations and acronyms used in this data sheet. A/D ADC CODEC D/A DMA EPB FCS FIFO FIQ GPIO ICT IR IRQ ...
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... Registers are referred to by acronym, with bits listed in brackets separated by a colon (:) (for exam- ple, CODR[7:0]), and are described in the CS98200 Registers document. The use of “TBD” indicates values that are “to be determined,” “n/a” designates “not available,” and “n/c” indicates a pin that is a “ ...
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... 11. ORDERING INFORMATION LEGEND Here is the legend for understanding the ordering information listed above. CS98200 — CV —XX Part Number Product Line: Embedded Processor Note the Cirrus Logic Internet site at http://cirrus.com/corporate/contacts to find contact information for your local sales representative ...