zl30132 Zarlink Semiconductor, zl30132 Datasheet
zl30132
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zl30132 Summary of contents
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... SDH line cards up to STM-64 osci osco SONET/ Ethernet ref APLL DPLL Programmable Synthesizer sync N*8kHz hold 2 lock I C/SPI JTAG 1 Zarlink Semiconductor Inc. ZL30132 Short Form Data Sheet February 2008 64 Pin CABGA Trays 64 Pin CABGA* Trays diff apll_clk p_clk p_fp ...
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... I Differential Output Enable (LVCMOS, Schmitt Trigger). When set high, the u differential LVPECL output driver is enabled. When set low, the differential driver is tristated reducing power consumption. This pin is internally pulled up to Vdd. Status ZL30132 Description . dd 5 Zarlink Semiconductor Inc. Short Form Data Sheet ...
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... Vdd. If this pin is not used then it should be connected to GND. H3 tck I Test Clock (LVCMOS): Provides the clock to the JTAG test logic. If this pin is not used then it should be pulled down to GND. ZL30132 Description interface. C Interface Enable (LVCMOS). If set high, the I 6 Zarlink Semiconductor Inc ...
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... Positive Analog Supply Voltage. +3. Positive Analog Supply Voltage. +1.8V CORE Ground. 0 Volts ZL30132 Description nominal. DC nominal. DC nominal. DC nominal Zarlink Semiconductor Inc. Short Form Data Sheet . If this pin is not used DD ...
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... I/O Pin # Name Type Analog Ground. 0 Volts Input I - Input, Internally pulled down Input, Internally pulled Output A - Analog P - Power G - Ground ZL30132 Description 8 Zarlink Semiconductor Inc. Short Form Data Sheet ...
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... B ref0 mode C sck/ cs_b/ scl asel0 D so sda E lock int_b F AV tms CORE G AV tdi SS H hold i2c_en corner is identified with a dot. ZL30132 ref1 sync2 apll_filter diff_en ref2 filter_ref0 V AV filter_ref1 ...
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... Ethernet/SONET/SDH clock and a PDH clock. A typical application is shown in Figure 2. In this application, the ZL30132 translates a 19.44 MHz clock from the telecom backplane to an Ethernet or SONET/SDH clock rate for the PHY and filters the jitter to ensure compliance with related clock standards. A programmable synthesizer provides PDH clocks with multiples of 8 kHz for generating PDH interface clocks. The ZL30132 allows easy integration of Ethernet line rates with today’ ...
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... For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...