89hpes32t8 Integrated Device Technology, 89hpes32t8 Datasheet

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89hpes32t8

Manufacturer Part Number
89hpes32t8
Description
32-lane, 8-port Pcie I/o Expansion Switch
Manufacturer
Integrated Device Technology
Datasheet
Device Overview
Express® switching solutions. The PES32T8 is a 32-lane, 8-port periph-
eral chip that performs PCI Express packet switching with a feature set
optimized for high performance applications such as servers, storage,
and communications/networking. It provides connectivity and switching
functions between a PCI Express upstream port and up to seven down-
stream ports and supports switching between downstream ports.
Features
Block Diagram
© 2007 Integrated Device Technology, Inc.
The 89HPES32T8 is a member of the IDT PRECISE™ family of PCI
SerDes
Logical
– Thirty-two 2.5 Gbps PCI Express lanes
– Eight switch ports
– Upstream port configurable up to x8
– Downstream ports configurable up to x8
– Low-latency cut-through switch architecture
– Support for Max Payload Size up to 2048 bytes
– One virtual channel
– Eight traffic classes
– PCI Express Base Specification Revision 1.1 compliant
Layer
High Performance PCI Express Switch
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 0)
SerDes
Logical
Layer
Phy
Frame Buffer
SerDes
Logical
Layer
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Phy
®
SerDes
Logical
Layer
Phy
32-Lane 8-Port
PCI Express® Switch
Multiplexer / Demultiplexer
8-Port Switch Core / 32 PCI Express Lanes
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 1)
Route Table
Figure 1 Internal Block Diagram
SerDes
Logical
Layer
Phy
SerDes
Logical
1 of 37
Layer
Phy
Arbitration
– Automatic per port link width negotiation to x8, x4, x2 or x1
– Automatic lane reversal on all ports
– Automatic polarity inversion on all lanes
– Ability to load device configuration from serial EEPROM
– PCI compatible INTx emulation
– Bus locking
– Requires no external components
– Incorporates on-chip internal memory for packet buffering and
– Integrates thirty-two 2.5 Gbps embedded SerDes with 8B/10B
– Supports ECRC and Advanced Error Reporting
– Internal end-to-end parity protection on all TLPs ensures data
– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
– Compatible with Hot-Plug I/O expanders used on PC and
Flexible Architecture with Numerous Configuration Options
Legacy Support
Highly Integrated Solution
Reliability, Availability, and Serviceability (RAS) Features
Port
queueing
encoder/decoder (no separate transceivers needed)
integrity even in systems that do not implement end-to-end
CRC (ECRC)
server motherboards
Scheduler
SerDes
Logical
Layer
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 7)
89PES32T8
Data Sheet
SerDes
Logical
March 25, 2008
Layer
Phy
SerDes
Logical
Layer
Phy

Related parts for 89hpes32t8

89hpes32t8 Summary of contents

Page 1

... Device Overview The 89HPES32T8 is a member of the IDT PRECISE™ family of PCI Express® switching solutions. The PES32T8 is a 32-lane, 8-port periph- eral chip that performs PCI Express packet switching with a feature set optimized for high performance applications such as servers, storage, and communications/networking ...

Page 2

IDT 89PES32T8 Data Sheet Power Management – Utilizes advanced low-power design techniques to achieve low typical power consumption – Supports PCI Power Management Interface specification (PCI-PM 1.1) • Supports device power management states: D0 cold – Unused SerDes ...

Page 3

IDT 89PES32T8 Data Sheet 8-port 8-port PCIe x4 PCIe x4 PES32T8 PES32T8 Note: The configurations in the above diagram show the maximum port widths. The PES32T8 ...

Page 4

IDT 89PES32T8 Data Sheet As shown in Figure 4, the master and slave SMBuses may be used in a unified or split configuration. In the unified configuration, shown in Figure 4(a), the master and slave SMBuses are tied together and ...

Page 5

IDT 89PES32T8 Data Sheet Pin Description The following tables lists the functions of the pins provided on the PES32T8. Some of the functions listed may be multiplexed onto the same pin. The active polarity of a signal is defined using ...

Page 6

IDT 89PES32T8 Data Sheet Signal PE7TP[3:0] PE7TN[3:0] PEREFCLKP[2:1] PEREFCLKN[2:1] REFCLKM Signal MSMBADDR[4:1] MSMBCLK MSMBDAT SSMBADDR[5,3:1] SSMBCLK SSMBDAT Type Name/Description O PCI Express Port 7 Serial Data Transmit. Differential PCI Express trans- mit pairs for port 7. When port 6 is ...

Page 7

IDT 89PES32T8 Data Sheet Signal GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] GPIO[6] GPIO[7] GPIO[8] GPIO[9] Type Name/Description I/O General Purpose I/O. This pin can be configured as a general purpose I/O pin. Alternate function pin name: P2RSTN Alternate function pin ...

Page 8

IDT 89PES32T8 Data Sheet Signal GPIO[10] GPIO[11] GPIO[12] GPIO[13] GPIO[14] GPIO[15] Signal CCLKDS CCLKUS MSMBSMODE P01MERGEN P23MERGEN Type Name/Description I/O General Purpose I/O. This pin can be configured as a general purpose I/O pin. Alternate function pin name: P5RSTN Alternate ...

Page 9

IDT 89PES32T8 Data Sheet Signal P45MERGEN P67MERGEN PERSTN RSTHALT SWMODE[3:0] Signal JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N Type Name/Description I Port 4 and 5 Merge. P45MERGEN is an active low signal pulled low internally via a 251K ohm resistor. ...

Page 10

IDT 89PES32T8 Data Sheet Signal V CORE APE Type Name/Description I Core VDD. Power supply for core logic. I I/O VDD. LVTTL I/O buffer power supply. ...

Page 11

IDT 89PES32T8 Data Sheet Pin Characteristics Note: Some input pads of the PES32T8 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate levels. This is especially critical for unused control signal inputs which, if ...

Page 12

IDT 89PES32T8 Data Sheet Function Pin Name PCI Express Inter- PEREFCLKN[2:1] face (cont.) PEREFCLKP[2:1] REFCLKM SMBus MSMBADDR[4:1] MSMBCLK MSMBDAT SSMBADDR[5,3:1] SSMBCLK SSMBDAT General Purpose I/O GPIO[15:0] System Pins CCLKDS CCLKUS MSMBSMODE P01MERGEN P23MERGEN P45MERGEN P67MERGEN PERSTN RSTHALT SWMODE[3:0] EJTAG / ...

Page 13

IDT 89PES32T8 Data Sheet Logic Diagram — PES32T8 Reference Clocks PCI Express Switch SerDes Input Port 0 PCI Express Switch SerDes Input Port 1 PCI Express Switch SerDes Input Port 2 PCI Express Switch SerDes Input Port 3 PCI Express ...

Page 14

IDT 89PES32T8 Data Sheet System Clock Parameters Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 13 and 14. Parameter PEREFCLK Refclk Input reference clock frequency range FREQ 2 Refclk Duty cycle of ...

Page 15

IDT 89PES32T8 Data Sheet 1. Minimum, Typical, and Maximum values meet the requirements under PCI Specification 1.1 Signal GPIO 1 GPIO[15:0] 1. GPIO signals must meet the setup and hold times if they are synchronous or the minimum pulse width ...

Page 16

IDT 89PES32T8 Data Sheet JTAG_TCK JTAG_TDI JTAG_TMS JTAG_TDO JTAG_TRST_N Recommended Operating Supply Voltages Symbol V CORE Internal logic supply DD V I/O I/O supply except for SerDes LVPECL/CML PCI Express Digital Power DD V APE PCI Express ...

Page 17

IDT 89PES32T8 Data Sheet Recommended Operating Temperature Power Consumption Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 13 (and also listed below). Maximum power is measured ...

Page 18

IDT 89PES32T8 Data Sheet Heat Sink Table 17 lists heat sink requirements for the PES32T8 under three common usage scenarios. As shown in this table, a heat sink is not required in most cases. Air Flow Zero 4.3”x6.6” (PCIe standard ...

Page 19

IDT 89PES32T8 Data Sheet DC Electrical Characteristics Values based on systems running at recommended supply voltages, as shown in Table 13. Note: See Table 8, Pin Characteristics, for a complete I/O listing. I/O Type Parameter Serial Link PCIe Transmit V ...

Page 20

IDT 89PES32T8 Data Sheet I/O Type Parameter Other I/Os LOW Drive I OL Output I OH High Drive I OL Output I OH Schmitt Trig ger Input V IH (STI) Input Capacitance C IN ...

Page 21

IDT 89PES32T8 Data Sheet Package Pinout — 500-BGA Signal Pinout for PES32T8 The following table lists the pin numbers and signal names for the PES32T8 device. Pin Function Alt Pin CORE ...

Page 22

IDT 89PES32T8 Data Sheet Pin Function Alt Pin E17 E18 PE7RP01 H5 E19 V CORE H26 DD E20 PE7RP02 H27 E21 V H28 SS E22 PE7RP03 H29 E23 V H30 SS E24 V CORE J1 DD E25 ...

Page 23

IDT 89PES32T8 Data Sheet Pin Function Alt Pin W5 PE2RP02 AC2 W26 PE5RP01 AC3 W27 PE5RN01 AC4 W28 V PE AC5 DD W29 PE5TP01 AC26 W30 PE5TN01 AC27 Y1 V AC28 APE AC29 ...

Page 24

IDT 89PES32T8 Data Sheet Pin Function Alt Pin AH23 V PE AJ10 DD AH24 V PE AJ11 TT AH25 SWMODE_1 AJ12 AH26 RSTHALT AJ13 AH27 GPIO_02 1 AJ14 AH28 V CORE AJ15 DD AH29 V AJ16 SS AH30 V CORE ...

Page 25

IDT 89PES32T8 Data Sheet Power Pins V Core V Core Y26 A4 AE1 A6 AE30 A29 AF2 B2 AF12 B4 AF16 B25 AF20 B29 AG2 C2 AG28 C4 AG30 C6 AH1 C28 AH28 D1 AH30 D28 AJ8 ...

Page 26

IDT 89PES32T8 Data Sheet Ground Pins C17 A3 C21 A5 C23 A7 C25 A11 C29 A13 C30 A15 D3 A17 D5 A19 D7 A23 D9 A26 D11 A30 D13 B1 D15 B3 D17 B5 D19 B6 ...

Page 27

IDT 89PES32T8 Data Sheet Signals Listed Alphabetically Signal Name CCLKDS CCLKUS GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08 GPIO_09 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N MSMBADDR_1 MSMBADDR_2 MSMBADDR_3 MSMBADDR_4 MSMBCLK MSMBDAT MSMBSMODE P01MERGEN ...

Page 28

IDT 89PES32T8 Data Sheet Signal Name PE0RN00 PE0RN01 PE0RN02 PE0RN03 PE0RP00 PE0RP01 PE0RP02 PE0RP03 PE0TN00 PE0TN01 PE0TN02 PE0TN03 PE0TP00 PE0TP01 PE0TP02 PE0TP03 PE1RN00 PE1RN01 PE1RN02 PE1RN03 PE1RP00 PE1RP01 PE1RP02 PE1RP03 PE1TN00 PE1TN01 PE1TN02 PE1TN03 PE1TP00 PE1TP01 PE1TP02 PE1TP03 PE2RN00 PE2RN01 ...

Page 29

IDT 89PES32T8 Data Sheet Signal Name PE2RP00 PE2RP01 PE2RP02 PE2RP03 PE2TN00 PE2TN01 PE2TN02 PE2TN03 PE2TP00 PE2TP01 PE2TP02 PE2TP03 PE3RN00 PE3RN01 PE3RN02 PE3RN03 PE3RP00 PE3RP01 PE3RP02 PE3RP03 PE3TN00 PE3TN01 PE3TN02 PE3TN03 PE3TP00 PE3TP01 PE3TP02 PE3TP03 PE4RN00 PE4RN01 PE4RN02 PE4RN03 PE4RP00 PE4RP01 ...

Page 30

IDT 89PES32T8 Data Sheet Signal Name PE4TN00 PE4TN01 PE4TN02 PE4TN03 PE4TP00 PE4TP01 PE4TP02 PE4TP03 PE5RN00 PE5RN01 PE5RN02 PE5RN03 PE5RP00 PE5RP01 PE5RP02 PE5RP03 PE5TN00 PE5TN01 PE5TN02 PE5TN03 PE5TP00 PE5TP01 PE5TP02 PE5TP03 PE6RN00 PE6RN01 PE6RN02 PE6RN03 PE6RP00 PE6RP01 PE6RP02 PE6RP03 PE6TN00 PE6TN01 ...

Page 31

IDT 89PES32T8 Data Sheet Signal Name PE6TP00 PE6TP01 PE6TP02 PE6TP03 PE7RN00 PE7RN01 PE7RN02 PE7RN03 PE7RP00 PE7RP01 PE7RP02 PE7RP03 PE7TN00 PE7TN01 PE7TN02 PE7TN03 PE7TP00 PE7TP01 PE7TP02 PE7TP03 PEREFCLKN1 PEREFCLKN2 PEREFCLKP1 PEREFCLKP2 PERSTN REFCLKM RSTHALT SSMBADDR_1 SSMBADDR_2 SSMBADDR_3 SSMBADDR_5 SSMBCLK SSMBDAT I/O ...

Page 32

IDT 89PES32T8 Data Sheet Signal Name SWMODE_0 SWMODE_1 SWMODE_2 SWMODE_3 V CORE APE I/O Type Location I AJ25 I AH25 I AF25 I AG25 See Table ...

Page 33

IDT 89PES32T8 Data Sheet PES32T8 Pinout — Top View ...

Page 34

IDT 89PES32T8 Data Sheet PES32T8 Package Drawing — 500-Pin BX500/BXG500 March 25, 2008 ...

Page 35

IDT 89PES32T8 Data Sheet PES32T8 Package Drawing — Page Two March 25, 2008 ...

Page 36

IDT 89PES32T8 Data Sheet Revision History February 8, 2007: Initial publication. April 4, 2007: In Table 3, revised description for MSMBCLK signal. May 30, 2007: Changed device revision in Ordering Information from ZD to ZH. November 14, 2007: Added new ...

Page 37

... A AAA NN Product Operating Device Family Voltage Family Valid Combinations 89HPES32T8ZHBX 500-ball BGA package, Commercial Temperature 89HPES32T8ZHBXG 500-ball Green BGA package, Commercial Temperature CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 ® NNAN AA AA Package Temp Range Product Device Detail ...

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