ocx256 ETC-unknow, ocx256 Datasheet
ocx256
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ocx256 Summary of contents
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... Readback is supported for device test and verification purposes. The OCX256 also supports the industry standard JTAG (IEEE 1149.1) interface for boundary scan testing. The JTAG interface can also be used to download configuration data to the device and readback data. A functional block diagram of the OCX256 is shown in Figure 1. ...
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... OCX256 Crosspoint Switch—Advanced Datasheet 2 (This page intentionally left blank) [Rev. 2.0] 3/21/02 Fairchild Semiconductor ...
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... JTAG State Machine .................................................................................................... 16 1.4.7 JTAG Input Format ...................................................................................................... 16 1.4.8 JTAG Instructions ........................................................................................................ 17 1.5 ImpliedDisconnect ............................................................................................................. 19 1.6 Device Reset Options ......................................................................................................... 20 2. Pin Description .....................................................................................................................21 3. Differential I/O Standards ...................................................................................................22 3.1 LVDS ................................................................................................................................. 22 3.2 LVPECL ............................................................................................................................. 23 4. Electrical Specifications .......................................................................................................24 4.1 Absolute Maximum Ratings .............................................................................................. 24 4.2 Recommended Operating Conditions ................................................................................ 24 4.3 Pin Capacitance ................................................................................................................. 24 4.4 DC Electrical Specifications .............................................................................................. 25 Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Contents [Rev. 2.0] 3/21/02 3 ...
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... Package and Pinout ............................................................................................................. 31 5.1 Package Pinout ................................................................................................................... 31 5.2 Pinout by Ball Sequence..................................................................................................... 32 5.3 Pinout by Ball Name .......................................................................................................... 36 5.4 Package Dimensions........................................................................................................... 40 5.5 Package Thermal Characteristics........................................................................................ 42 6. Power Consumption ............................................................................................................ 43 6.1 Power for OCX256L (LVDS) ............................................................................................ 43 6.2 Power for OCX256P (LVPECL) ........................................................................................ 44 7. Component Availability and Ordering Information ......................................................... 45 8. Glossary ................................................................................................................................ 45 9. Product Status Definition .................................................................................................... 47 4 [Rev. 2.0] 3/21/02 Fairchild Semiconductor ...
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... OCX256 Package Pinout .................................................................................................................... 31 Figure 18 OCX256 Package—Bottom View ...................................................................................................... 40 Figure 19 OCX256 Package—Top and Side Views ........................................................................................... 41 Figure 20 Power Consumption Diagram for the OCX256L using LVDS .......................................................... 43 Figure 21 Power Consumption Diagram for the OCX256P using LVPECL...................................................... 44 Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Figures [Rev ...
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... OCX256 Crosspoint Switch—Advanced Datasheet Table 1 Summary for Programmable I/O Attributes for OCX256 ................................................................. 8 Table 2 Next Neighbor Outputs.................................................................................................................... 10 Table 3 RapidConfigure Programming Instructions .................................................................................... 11 Table 4 RCO[4:0] Readback Pin Assignment.............................................................................................. 13 Table 5 Programming an Output Buffer using RapidConfigure .................................................................. 13 Table 6 Mode Control Register .................................................................................................................... 14 Table 7 JTAG Input Format ......................................................................................................................... 16 Table 8 JTAG Instructions ........................................................................................................................... 17 Table 9 Programming an Output using JTAG ...
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... Introduction The OCX256 is a differential crosspoint-switching device. The main functional block of the device is a Switch Matrix as shown in Figure 1. The Switch Matrix is a x-y structure supporting an input-to-output data flow. Figure 2 shows a conceptual view of the switch matrix with inputs connected to the horizontal trace and outputs to the vertical trace ...
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... Next Neighbor Clock Select Input and Output Buffer Configuration Summary for Programmable I/O Attributes for OCX256 I/O Port Function Input – The external signal is buffered from the Input Port pin to the corresponding Switch Matrix line. Output – The internal signal is buffered from the corresponding Switch Matrix line to the Output Port pin ...
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... The Global Update pin (UPDATE#) must be held high during Broadcast Mode. Asserting the UPDATE# pin returns the array to the previous program condition. 1.2 Output Buffer Configuration Every output port of the OCX256 can be configured as either a flow-through or registered output. In registered mode there are two clock sources that are available: • ...
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... OCX256 Crosspoint Switch—Advanced Datasheet Crosspoint Array Any Input Port (INx) Any Input Port (INy) Figure 4 The advantages of next neighbor clocking are: 1. Using next neighbor clocking in the registered output (RO) mode helps reduce the skew in outgoing data. 2. For a design with a large number of outputs switching simultaneously, next neighbor clocking mode is useful to stagger outputs for reduced board noise caused by simultaneous switching outputs ...
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... RapidConfigure Interface RapidConfigure (RC signal parallel interface that is used to program the OCX256 device. The 25 pins are allocated as follows: RCA[6:0] = RapidConfigure Address A. RCA are input pins. RCB[6:0] = RapidConfigure Address B. RCB are input pins. RCI[3:0] = RapidConfigure Instruction Bits RCO[4:0] = RapidConfigure Readback. RCO are output pins. ...
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... OCX256 Crosspoint Switch—Advanced Datasheet Table 3 RCI[3:0] RCA[6:0] RCB[6:0] Cycle 0110 X X 0111 X Input Port Address 1000 Output Port Input Port Address Address 1001 Output Port Input Port Address Address 1010 Output Port Input Port Address Address 1011 1100 1101 ...
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... RCB[6:0] B6, B5 B1, B0 0,0 0,1 1,0 1,1 Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet RCO[4:0] Readback Pin Assignment Signal/Function Connection Status connection (NC) — (default state at reset Connected Clock Select Global Clock — (default state at reset Next Neighbor Output Mode Flow-through (OP) — (default state at reset) ...
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... Mode Control Register Configuration The OCX256 contains a single bit Mode Control Register used to store user flags for RapidConfigure Enable (RCE). These are required for proper functioning of the device. The contents of this register can be changed using the JTAG interface and a special JTAG instruction. ...
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... JTAG Architecture and Shift Registers Device Identification Register - 32 Bits TDI TMS TCK Figure 5 Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Boundary Scan Register (285 570 Bits) JTAG Data Register - 1 Bit Mode Control Register - 1 Bit JTAG Address Register - 7 Bits Bypass Register - 1 Bit ...
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... Select DR 1 Scan 0 1 Capture DR 0 Shift Exit Pause Exit Update OCX256 JTAG State Machine Table 7 JTAG Input Format Data [Rev. 2.0] 3/21/02 1 Select IR Scan 0 1 Capture IR 0 ...
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... Data OE Select Mode Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Table 8 JTAG Instructions B7 A6-A0 Instruction X X Sample/EXTEST X X Sample/EXTEST X X Reset the Crosspoint Array X X Set Array for Broadcast mode ...
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... JTAG Address Register becomes the Input port address for Crosspoint Access. Serialize the device ID and revision history out to TDO. ID for the OCX256 is 0x0000C89F Resets the Crosspoint Array to no-connects. Sets the Output buffer to Flow-through mode with Output Enabled. The device ID is serialized to TDO. ...
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... Thus, a connection change, i.e. breaking an existing connection and then making a new one, can be accomplished in one RapidConfigure cycle. Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Programming an Output using JTAG Signal/Function Clock Select Global Clock ...
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... OCX256 Crosspoint Switch—Advanced Datasheet 1.6 Device Reset Options The power-on reset, RapidConfigure reset, hardware reset, and JTAG reset functions will program the output buffers to flow-through mode (with Global Clock selected), and Output Enabled (ON). JTAG can be reset via the TRST# pin or by clocking five consecutive one to the TMS pin. The hardware reset pin can be done accomplished through the HW_RST# pin (active low) ...
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... Dedicated differential input buffers can receive both LVDS and LVPECL voltage levels using 3.3V supply .PAD is 2.5V for OCX256L or 3.3V for OCX256P The LVTTL control, JTAG pins, and differential input ports are 3.3V—they are not 5V tolerant. 4. The differential output pins powered from 2.5V are 3.3V tolerant. ...
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... The OCX256 supports the two most popular differential signaling standards: Low Voltage Differential Signaling (LVDS) and Low Voltage Positive Emitter Coupled Logic (LVPECL). LVDS is typically used in communication systems as high speed, low noise point-to-point links. The OCX256 conforms to the ANSI/TIA/EIA-644 standard covering electrical specifications for output drivers and receiver inputs ...
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... LVPECL is another differential signaling standard that specifies two pins per input or output. The voltage swing between these two signal lines is approximately 850 mV. The use of a reference voltage or a board termination voltage is not required. The OCX256P supports LVPECL signalling. Integrated Output Attenuator resistors produce the required LVPECL Output swing while providing a 100 ohm output impedance to minimize return reflections ...
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... OCX256 Crosspoint Switch—Advanced Datasheet 4. Electrical Specifications 4.1 Absolute Maximum Ratings Symbol V .CORE .PAD STG P MAX (6) ESD 4.2 Recommended Operating Conditions Table 14 Symbol V .CORE Supply Voltage (core) DD (4) V .PAD Supply Voltage (differential output buffers .IN Supply Voltage (inputs) ...
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... Tristate Leakage Output OFF State OZ (3) P Quiescent Power DDQ Table 17 OCX256L (LVDS) DC Electrical Specifications (V DC Parameter Output High Voltage for OUTP and OUTN Output Low Voltage for OUTP and OUTN Differential Output Voltage Output Common-Mode Voltage Differential Input Voltage Input Common-Mode Voltage Z — ...
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... OCX256 Crosspoint Switch—Advanced Datasheet 4.5 AC Electrical Specifications (V .IN = 3.3V ±10%, V .CORE = 2.5V ±5 Table 19 AC Electrical Specifications Symbol (1) R NRZ Data Rate DATA F Registered Output Clock Frequency RO t Registered Clock Pulse Width, High or Low W_RO t Registered Output Setup Time to Clock S_RO t Registered Output Clock to Hold Data ...
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... Matrix InPort D CLK Figure 9 IN InPort 1 Switch Matrix InPort 2 Figure 10 Flow-Through Mode Timing IN OP Switch Matrix InPort OE# Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet CLK t InPort OutPort Q OutPort Registered Output Mode Timing InPort 1 InPort 2 OP OutPort 1 OutPort 1 OutPort 2 OutPort 2 OE# InPort t ...
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... OCX256 Crosspoint Switch—Advanced Datasheet Switch IN OP Matrix InPort RC_CLK# RCA/RCB Address, Instruction RC_EN# Figure 13 RapidConfigure Write Cycle 28 t IN+ InPort OutPort t OUT+ OutPort t t Figure 12 Duty Cycle Distortion W+_RC W-_RC t t S_RC H_RC t t S_RC H_RC [Rev. 2.0] 3/21/02 t IN- t OUT- ...
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... RC_CLK# RCA/RCB Address, Instruction RC_EN# RCO Figure 14 RapidConfigure Read Cycle t W_JTAG TCK t S_JTAG TDI, TMS TDO Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet W+_RC W-_RC t t S_RC H_RC t t S_RC H_RC High Impedance t W_JTAG t H_JTAG t P_JTAG Figure 15 JTAG Timing [Rev ...
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... OCX256 Crosspoint Switch—Advanced Datasheet Figure 16 Typical Performance at 667 Mb/s with PRBS Data 30 [Rev. 2.0] 3/21/02 Fairchild Semiconductor ...
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... OUT100N OUT97P OUT92P Vss OUT106N Vss Vss Vss OUT112P OUT109N OUT104N OUT99P OUT96N OUT93N Figure 17 OCX256 Package Pinout [Rev. 2.0] 3/21/ OUT37P Vss OUT47N Vss V .PAD Vss DD OUT40P OUT45N OUT50N OUT54P ...
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... A35 V B35 OUT63P SS A36 V B36 RCO1 SS A37 V B37 A38 V B38 A39 V B39 Table 20 OCX256 Pinout By Ball Sequence Ball # Ball Name Ball # Ball Name TDO OUT00P D6 RCO4 ...
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... DD W37 IN32P Y37 IN33N W38 IN32N Y38 IN33P W39 V Y39 V . Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Table 20 OCX256 Pinout By Ball Sequence (Continued) Ball # Ball Name Ball # Ball Name IN117P SS J2 IN120P K2 IN117N J3 IN120N K3 IN118P J4 V .IN K4 ...
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... AM36 IN60P AL37 V .IN AM37 IN59N DD AL38 V .IN AM38 IN59P DD AL39 IN56N AM39 IN58N 34 Table 20 OCX256 Pinout By Ball Sequence (Continued) Ball # Ball Name Ball # Ball Name AG1 IN79P AH1 IN78N AG2 V .IN AH2 IN78P DD AG3 IN80N AH3 IN77N AG4 IN80P AH4 ...
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... V SS AP37 RCA3 AR37 RCB0 AP38 RCA2 AR38 RCA4 AP39 IN61P AR39 IN62P Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Table 20 OCX256 Pinout By Ball Sequence (Continued) Ball # Ball Name Ball # Ball Name AT1 V AU1 V SS AT2 RCI3 AU2 V AT3 V AU3 V SS ...
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... IN41P IN19N P37 IN42N IN19P P36 IN42P IN20N P39 IN43N IN20P P38 IN43P IN21N R35 IN44N 36 OCX256 Pinout By Ball Name Ball # Ball Name Ball # Ball Name R34 IN44P AE36 IN67P R37 IN45N AF39 IN68N R36 IN45P AE34 IN68P R39 IN46N AF37 ...
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... OUT27N OUT04N B7 OUT28P OUT05P B8 OUT28N OUT05N C8 OUT29P OUT06P F9 OUT29N OUT06N A8 OUT30P Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet OCX256 Pinout By Ball Name (Continued) Ball # Ball Name Ball # Ball Name D9 OUT30N E19 OUT54P E9 OUT31P B19 OUT54N B9 OUT31N C19 OUT55P C9 OUT32P D20 OUT55N ...
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... OUT122P AT8 V .CORE DD OUT122N AU8 V .CORE DD OUT123P AP8 V .CORE DD OUT123N AR8 V .CORE DD OUT124P AV7 V .CORE DD 38 OCX256 Pinout By Ball Name (Continued) Ball # Ball Name Ball # Ball Name AW6 V .CORE E26 V .CORE DD DD AT7 V .CORE E28 V .CORE DD DD AU7 V .CORE E30 V .CORE DD ...
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... AN1 AN39 AR1 SS V AR4 SS Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet OCX256 Pinout By Ball Name (Continued) Ball # Ball Name Ball # Ball Name AR5 AR35 AR36 AT1 AT3 AT4 AT5 AT35 AT36 AT37 AT39 AU1 AU2 AU3 ...
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... OCX256 Crosspoint Switch—Advanced Datasheet 5.4 Package Dimensions Figure 18 OCX256 Package—Bottom View 40 [Rev. 2.0] 3/21/02 Fairchild Semiconductor ...
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... Figure 19 OCX256 Package—Top and Side Views Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet [Rev. 2.0] 3/21/02 41 ...
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... OCX256 Crosspoint Switch—Advanced Datasheet 5.5 Package Thermal Characteristics Table 22 Package TBGA NOTE: 1. Thermal performance values are based on simulation data. 42 Package Thermal Coefficients ° Pin Count (C/W) Still Air JC 792 0.4 7.58°C/W [Rev. 2.0] 3/21/02 C/W) Fairchild Semiconductor ...
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... Power for OCX256L (LVDS) Input Power (always ON) (512mW + 6.5mW/Input Example: Worst Case = (512mW + 832mW) + (0.015 mW x 667 x 128) + (20mW x 128) Figure 20 Power Consumption Diagram for the OCX256L using LVDS Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Core Power Switch Matrix ...
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... OCX256 Crosspoint Switch—Advanced Datasheet 6.2 Power for OCX256P (LVPECL) Input Power (always ON) 512mW + 10mW/Input Example: Worst Case = (512mW + 1280mW) + (0.015 mW x 667 x 128) + (37mW x 128) Figure 21 Power Consumption Diagram for the OCX256P using LVPECL 44 Core Power Switch Matrix OE 0.015mW/Mbs/Connection 37mW/Output + 1792mW 1280mW = 7 ...
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... RAPIDCONFIGURE: A parallel programming method for the OCX devices. The RC mode uses 25 dedicated pins to program the Crosspoint Array and the IO Buffers. The 25 pins consist of an enable, a clock, four instruction bits, two seven-bit address fields, and a five-bit data field. Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet OCXxxxx - PPT [Rev. 2.0] 3/21/02 45 ...
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... Pass Transistor to high-performance buffering circuit; updated power and ground pin count in Table 12. Created separate parts for LVDS and LVPECL (OCX256L and OCX256P respectively); created new LVDS and LVPECL signal drawings; created new LVDS and LVPECL power consumption drawings; updated DC electrical specifications tables ...
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... A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect is safety of effectiveness. www.fairchildsemi.com Fairchild Semiconductor OCX256 Crosspoint Switch—Advanced Datasheet Product Status This datasheet contains the design specifications for product development. Specification may change in any manner without notice. ...