hb2881000a5 Renesas Electronics Corporation., hb2881000a5 Datasheet
hb2881000a5
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hb2881000a5 Summary of contents
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... Description HB2881000A5 is Flash ATA card. This card complies with PC card ATA standard and is suitable for the usage of data storage memory medium for PC or any other electric equipment. This card is equipped with Hitachi 256 Mega bit Flash memory. This card is suitable for ISA (Industry Standard Architecture) bus interface standard, and read/write unit is 1 sector (512 bytes) sequential access ...
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... HB2881000A5 1 Card Line Up* Type No. Card density Capacity* HB2881000A5 1 GB 1,025,482,752 byte 2,002,896 Notes: 1. These data are written in ID. 2. Total tracks = number of head 3. Total sectors/card = sectors/track the logical address capacity including the area which is used for file system. 2 Total sectors/ Sectors/ ...
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... I I I/O D2 -IOIS16 O -IOIS16 HB2881000A5 I/O — I/O I/O I/O I/O I — — — — — — — — I/O I/O I ...
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... HB2881000A5 Memory card mode Pin No. Signal name I/O 34 GND — 35 GND — 36 -CD1 O 37 D11 I/O 38 D12 I/O 39 D13 I/O 40 D14 I/O 41 D15 I/O 42 -CE2 I 43 -VS1 O 44 -IORD I 45 -IOWR I 46 — — 47 — — 48 — — 49 — — 50 — — 51 VCC — 52 — — 53 — ...
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... Byte/Word/Odd byte mode are defined by combination of -CE1, -CE2 and A0. -CE2 is used for select the Alternate Status Register and the Device Control Register while -CE1 is the chip select for the other task file registers. HB2881000A5 5 ...
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... HB2881000A5 Signal name Direction Pin No. -CSEL I (PC Card Memory mode) -CSEL (PC Card I/O mode) -CSEL (True IDE mode) D15 to D0 I/O (PC Card Memory mode) D15 to D0 (PC Card I/O mode) D15 to D0 (True IDE mode) GND — (PC Card Memory mode) GND (PC Card I/O mode) GND (True IDE mode) ...
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... High for task file, Low for attribute memory is accessed. -REG is constantly low when task file or attribute memory is accessed. This input signal is not used and should be connected to VCC. HB2881000A5 7 ...
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... HB2881000A5 Signal name Direction Pin No. RESET I (PC Card Memory mode) RESET (PC Card I/O mode) -RESET (True IDE mode) VCC — (PC Card Memory mode) VCC (PC Card I/O mode) VCC (True IDE mode) -VS1, -VS2 O (PC Card Memory mode) -VS1, -VS2 (PC Card I/O mode) -VS1, -VS2 ...
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... This output signal is asserted low when this device is expecting a word data transfer cycle. Initial mode is 16-bit. If the user issues a Set Feature Command to put the device in Byte access mode, the card permits 8-bit accesses. HB2881000A5 9 ...
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... HB2881000A5 Card Block Diagram V CC GND A0 to A10 -CE1,-CE2 -OE/-ATASEL -WE -IORD -IOWR -REG RESET/-RESET -CSEL D0 to D15 BVD1/-STSCHG/-PDIAG BVD2/-SPKR/-DASP RDY/-BSY/-IREQ/INTRQ WP/-IOIS16 -INPACK -WAIT/IORDY -VS1 -VS2 -CD1 -CD2 Note: -CE1, -CE2, -OE, -WE, -IORD, -IOWR, -REG, RESET, -CSEL, -PDIAG, -DASP pins are pulled up in card ...
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... CIS ( C ard I nformation S tructure) Task File region Data register Error register Feature register Sector Count register Sector Number register Cylinder Low register Cylinder High register Drive Head register Status register Alternate Status register Command register Device Control register Drive Address register HB2881000A5 11 ...
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... HB2881000A5 Host access specifications 1. Attribute access specifications When CIS-ROM region or Configuration register region is accessed, read and write operations are executed under the condition of -REG = "L" as follows. That region can be accessed by Byte/Word/Odd-byte modes which are defined by PC card standard specifications. Attribute Read Access Mode ...
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... Dout write cycle HB2881000A5 - D15 High-Z High-Z H High-Z even byte H High-Z odd byte H odd byte even byte H odd byte High-Z - D15 Don’t care Don’t care H Don’t care even byte H Don’ ...
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... HB2881000A5 (2) Memory address map Task File Register Read Access Mode (2) Mode -REG -CE2 Standby mode H Byte access (8-bit Word access (16-bit Odd byte access (8-bit Note Task File Register Write Access Mode (2) Mode -REG -CE2 Standby mode ...
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... -IORD -IOWR 1- Dout HB2881000A5 D8 to D15 High-Z High-Z High-Z High-Z odd byte even byte High-Z status out High-Z data D8 to D15 don’t care don’t care don’t care don’t care ...
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... HB2881000A5 Configuration register specifications This card supports four Configuration registers for the purpose of the configuration and observation of this card. These registers can be used in memory card mode and I/O card mode. In True IDE mode, these registers can not be used. 1. Configuration Option register (Address 200H) This register is used for the configuration of the card configuration status and for the issuing soft reset to the card ...
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... I/O card interface has been configured or not. This signal remains true until the condition which caused the interrupt request has been serviced. If interrupts are disabled by the -IEN bit in the Device Control Register, this bit is a zero. bit4 bit3 bit2 0 0 PWD HB2881000A5 bit1 bit0 INTR 0 17 ...
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... HB2881000A5 3. Pin Replacement register (Address 204H) This register is used for providing the signal state of -IREQ signal when the card configured I/O card interface. bit7 bit6 bit5 0 0 CRDY/-BSY 0 Note: initial value: 0CH Name R/W Function CRDY/-BSY R/W This bit is set to "1" when the RRDY/-BSY bit changes state. This bit may also be (HOST-> ...
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... Link length is 4 bytes HITACHI JEDEC manufacturer’s ID Code of 0 because other byte is JEDEC 1 byte manufacture’s ID HITACHI code for PC CARD ATA HB2881000A5 CIS function Tuple code Link to next tuple Device type, WPS, speed Extended speed Device size END marker Tuple code ...
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... HB2881000A5 Address Data 02CH 15H CISTPL_VERS_1 02EH 15H TPL_LINK 030H 04H TPPLV1_MAJOR 032H 01H TPPLV1_MINOR 034H 48H 036H 49H 038H 54H 03AH 41H 03CH 43H 03EH 48H 040H 49H 042H 00H 044H 46H 046H 4CH 048H 41H ...
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... Configuration registers are located at 200H in REG space I: Configuration index C: Configuration and status P: Pin replacement S: Socket and copy HB2881000A5 CIS function Tuple code Link to next tuple Extension tuple type for disk Interface type Tuple code Link to next tuple ...
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... HB2881000A5 Address Data 082H 1BH CISTPL_CFTABLE_ENTRY 084H 08H TPL_LINK 086H C0H I D Configuration index 088H 40H Interface type 08AH A1H 08CH 01H 08EH 55H X Mantissa Exponent 090H 08H ...
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... DI: Power down current info PI: Peak current info AI: Average current info SI: Static current info HV: Max voltage info LV: Min voltage info NV: Nominal voltage info Nominal voltage = 3 nominal value CC +0.3 V Extension byte Max average current over 10 Max. average current msec HB2881000A5 CC 23 ...
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... HB2881000A5 Address Data 0A6H 1BH CISTPL_CFTABLE_ ENTRY 0A8H 0AH TPL_LINK 0AAH C1H I D Configuration INDEX 0ACH 41H Interface type 0AEH 99H 0B0H 01H 0B2H 55H X Mantissa Exponent 0B4H ...
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... Recommended routing to any Q “normal, maskable” IRQ Nomore misc fields R: reserved Power down supported Not read only mode Audio not supported Single drive HB2881000A5 CIS function Mask extension byte 1 TPCE_IR Maskextension byte 2 TPCE_IR Miscellaneous features field TPCE_MI 25 ...
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... HB2881000A5 Address Data 0BEH 1BH CISTPL_CFTABLE_ENTRY 0C0H 06H TPL_LINK 0C2H 01H I D Configuration index 0C4H 01H 0C6H 21H 0C8H B5H X Mantissa Exponent 0CAH 1EH X Extension 0CCH 4DH X Mantissa Exponent 26 Description of contents ...
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... Nominal voltage = nominal value Range follows I/O space description field 16-bit hosts supported TPCE_IO 8-bit hosts supported IO AddrLines: 10 lines decoded Size of lengths is 1 I/O range format description byte Size of address is 2 bytes N Range = 1: Address r ange - 1 HB2881000A5 CC 27 ...
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... HB2881000A5 Address Data 0E0H F0H 0E2H 01H 0E4H 07H 0E6H F6H 0E8H 03H 0EAH 01H 0ECH EEH IRQ level 0EEH 20H Description of contents CIS function 1st I/O base address (LSB) 1st I/O range address ...
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... DI: Power down current info PI: Peak current info AI: Average current info SI: Static current info HV: Max voltage info LV: Min voltage info NV: Nominal voltage info Nominal voltage = 3 nominal value CC +0.3 V Extension byte Max average current over 10 Max. average current msec HB2881000A5 CC 29 ...
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... HB2881000A5 Address Data 100H 1BH CISTPL_CFTABLE_ENTRY 102H 0FH TPL_LINK 104H C3H I D Configuration INDEX 106H 41H Interface type 108H 99H 10AH 01H 10CH 55H X Mantissa Exponent 10EH EAH R ...
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... TPCE_IR Level mode IRQ supported Bit mask of IRQs present IRQ level is IRQ14 Nomore misc fields Miscellaneous features field R: reserved TPCE_MI Power down supported Not read only mode Audio not supported Single drive HB2881000A5 31 ...
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... HB2881000A5 Address Data 122H 1BH CISTPL_CFTABLE_ENTRY 124H 06H TPL_LINK 126H 03H I D Configuration index 128H 01H 12AH 21H 12CH B5H X Mantissa Exponent 12EH 1EH X Extension 130H 4DH X Mantissa Exponent 132H ...
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... Alt. status register Drive address register 0 8H Even data register 1 9H Odd data register HB2881000A5 - Data register Feature register Sector count register Cylinder low register Cylinder high register Drive head register Command register Dup. odd data register Dup. feature register ...
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... HB2881000A5 Contiguous I/O map (INDEX = 1) -REG A10 Primary I/O map (INDEX = 2) -REG A10 ...
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... Cylinder low register 1 Cylinder high register 0 Drive head register 1 Status register 0 Alt. status register 1 Drive address register HB2881000A5 -IOWR = L Data register Feature register Sector count register Sector number register Cylinder low register Cylinder high register Drive head register Command register Device control register ...
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... HB2881000A5 1. Data register: This register is a 16-bit register that has read/write ability, and it is used for transferring 1 sector data between the card and the host. This register can be accessed in word mode and byte mode. This register overlaps the Error or Feature register. ...
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... This bit is used for selecting the Master (Card 0) and Slave (Card 1) in Master/Slave organization. The card is set to be Card using DRV# of the Socket and Copy register. This bit is used for selecting the Head number for the following command. Bit 3 is MSB. HB2881000A5 bit1 bit0 bit1 bit0 ...
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... HB2881000A5 9. Status register: This register is read only register, and it indicates the card status of command execution. When this register is read in configured I/O card mode (INDEX = and level interrupt mode, -IREQ is negated. This register should be accessed in byte mode. In word mode recommended that Alternate status register may be used as this register ...
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... 87H F5H E8H 32H or 33H C5H CDH 30H or 31H 38H 3CH HB2881000A5 LBA ...
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... HB2881000A5 Note: FR: Feature register SC: Sector Count register SN: Sector Number register CY: Cylinder register DR: DRV bit of Drive Head register HD: Head Number of Drive Head register LBA: Logical Block Address Mode Supported Y: The register contains a valid parameter for this command. N: The register does not contain a valid parameter for this command. ...
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... Y C5H — CDH — 30H or 31H — 38H — 3CH — HB2881000A5 LBA — Y — — — Y — — — Y — — — Y — ...
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... HB2881000A5 Note: FR: Feature Register SC: Sector Count register SN: Sector Number register (01H to 20H) CY: Cylinder Low/High register (to) DR: Drive bit of Drive/Head register HD: Head No.( Drive/Head register NH: No. of Heads Y: Set up —: Not set up 1. Check Power Mode (code: E5H or 98H): This command checks the power mode. ...
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... Maximum of 1 sector on Read/Write Multiple command Double Word not supported Capabilities: DMA NOT Supported (bit 8), LBA supported (bit9) Reserved PIO data transfer cycle timing mode 1 DMA data transfer cycle timing mode not Supported Reserved Multiple sector setting is valid Total number of sectors addressable in LBA Mode Reserved HB2881000A5 43 ...
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... HB2881000A5 10. Read Multiple (code: C4H): This command performs similarly to the Read Sectors command. Interrupts are not generated on each sector, but on the transfer of a block which contains the number of sectors defined by a Set Multiple command. 11. Read Long Sector (code: 22H or 23H): This command performs similarly to the Read Sector(s) command except that it returns 516 bytes of data instead of 512 bytes ...
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... Write Sector(s) without Erase (code: 38H): This command is similar to the Write Sector(s) command with the exception that an implied erase before write operation is not performed. 30. Write Verify (code: 3CH): This command is similar to the Write Sector(s) command, except each sector is verified immediately after being written. HB2881000A5 45 ...
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... HB2881000A5 Sector Transfer Protocol 1. Sector read: 1 sector read procedure after the card configured I/O interface is shown as follows. Start Set the cylinder low / high register Set the head No. of drive head register Set the sector number register Set "01H" in sector count register Set "20H" in Command register ...
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... A0 to A10 -CE1 -CE2 -IOWR -IORD 01H20H 80H D0 to D15 -IREQ (2) (3) ( Data transfer 58H HB2881000A5 ( 80H 50H 47 ...
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... HB2881000A5 2. Sector write: 1 sector write procedure after the card configured I/O interface is shown as follows. Start Set the cylinder low / high register Set the head No. of drive head register Set the sector number register Set "01H" in sector count register Set "30H" in command register ...
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... A0 to A10 -CE1 -CE2 -IOWR -IORD D0 to D15 01H30H 80H -IREQ (2) (3) ( Data transfer 58H HB2881000A5 ( 80H 50H 49 ...
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... HB2881000A5 Absolute Maximum Ratings Parameter All input/output voltages V voltage CC Operating temperature range Storage temperature range Note: 1. Vin, Vout min = –2.0 V for pulse width Recommended DC Operating Conditions Parameter Symbol Operating temperature Ta V voltage Capacitance (Ta = 25˚ 1MHz) Parameter Symbol Input capacitance ...
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... A — — 0.6 V 2.4 — — V — 1.0 — V — 1.8 — V — — 0 – 0.8 — — HB2881000A5 Test conditions Note Vin = GND – Test conditions Note Vin = GND – ...
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... HB2881000A5 DC Characteristics-3 ( +60˚C, V Parameter Symbol Sleep/standby current I SP1 Sector read current I (DC) CCR I (Peak) 80 CCR Sector write current I (DC) CCW I (Peak) 80 CCW DC Characteristics-4 ( +60˚C, V Parameter Symbol Sleep/standby current I SP1 Sector read current I (DC) CCR I (Peak) 50 CCR Sector write current ...
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... DC Current Waveform (V CC Power on Operation (Reference only) Power 25˚C) HB2881000A5 DC Time 53 ...
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... HB2881000A5 Sector Read 0 Command write Sector Write 0 Command write R(DC) CC Time Complete of sector read W(DC) CC Time Complete of sector write R(Peak) W(Peak) ...
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... CR t a(A) t h(A) t a(CE h(CE) su(CE) t a(OE) t en(OE) t en(CE) Valid Output -WE, -IOWR, -IORD : High Fix HB2881000A5 Max Unit — ns 250 ns 250 ns 125 ns 100 ns 100 ns — ns — ns — ns — ns — ns — ns — v(A) t dis(CE) t dis(OE) 55 ...
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... HB2881000A5 Attribute Memory Write AC Characteristics Parameter Write cycle time Write pulse time Address setup time Address setup time (-WE) -CE setup time (-WE) Data setup time (-WE) Data hold time Write recover time Output disable time (-WE) Output disable time (-OE) Output enable time (-WE) Output enable time (-OE) ...
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... Valid Output t d(IORD) -WE, -OE, -IOWR : High Fix HB2881000A5 Max Unit 100 ns — ns — ns — ns — ns — ns — ns — ns — ...
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... HB2881000A5 I/O Access Write AC Characteristics Parameter Data setup before -IOWR Data hold following -IOWR -IOWR pulse width Address setup before -IOWR Address hold following -IOWR -CE setup before -IOWR -CE hold following -IOWR -REG setup before -IOWR -REG hold following -IOWR -IOIS16 delay falling from address ...
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... Common Access Read Timing A0 to A10 t su(A) -REG -CE2/-CE1 - D15 Symbol Min Typ ta(OE) — — tdis(OE) — — tsu(A) 30 — th(A) 20 — tsu(CE) 0 — th(CE) 20 — t h(A) t su(CE) t h(CE) t a(OE) Valid Output -WE, -IORD, -IOWR : High Fix HB2881000A5 Max Unit 125 ns 100 ns — ns — ns — ns — dis(OE) 59 ...
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... HB2881000A5 Common Memory Access Write AC Characteristics Parameter Data setup time (-WE) Data hold time Write pulse time Address setup time -CE setup time Write recover time -CE hold following -WE Common Access Write Timing A0 to A10 -REG -CE2/-CE1 - D15 60 Symbol Min Typ tsu(D-WEH) 80 — ...
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... Valid Output HB2881000A5 Max Unit 100 ns — ns — ns — ns — ns — ns — drlOIS16(ADR) t h(IORD) 61 ...
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... HB2881000A5 True IDE Mode Access Write AC Characteristics Parameter Data setup before IOWR data hold following IOWR IORD width time address setup before IOWR address hold following IOWR CE setup before IOWR CE hold following IOWR IOIS16 delay falling from address IOIS16 delay rising from address ...
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... High-Z RESET Min Typ Max Unit 100 — — — — s 0.1 — 100 ms 3 — 300 ms 10 — — s — — ms — — ms 90% t rec( t su(RESET) t w(RESET) t Low HB2881000A5 Test conditions Note cc) 10% s(Hi-ZRESET) High-Z 63 ...
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... HB2881000A5 Power on Reset Characteristics All card status are reset automatically when V Parameter Symbol -CE setup time tsu(VCC) VCC rising up time tpr Power on Reset Timing V -CE1, -CE2 Attention for Card Use In the reset or power off, all register informations are cleared. All card status are cleared automatically when V Notice that the card insertion/removal should not be executed during host is active, if the card is used in True IDE mode ...
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... Physical Outline 54.0 34 pin 68 pin 41.91 (Reference value) Surface A 0.1 85.6 0.2 Surface A 1 pin 1.27 0.1 35 pin 1.27 0.1 Surface B HB2881000A5 Unit: mm 5.0 (max) 10.0 min 3.3 0.1 65 ...
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... HB2881000A5 Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document ...