mt8lsdt3264ay-13e Micron Semiconductor Products, mt8lsdt3264ay-13e Datasheet

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mt8lsdt3264ay-13e

Manufacturer Part Number
mt8lsdt3264ay-13e
Description
256mb X64, Sr , 512mb X64, Dr 168-pin Sdram Udimm
Manufacturer
Micron Semiconductor Products
Datasheet
Synchronous DRAM Module
MT8LSDT3264A(I) - 256MB
MT16LSDT6464A(I) - 512MB
For the latest data sheet, please refer to the Micron
Features
• PC100- and PC133-compliant
• 168-pin, dual in-line memory module (DIMM)
• Utilizes 125 MHz and 133 MHz SDRAM
• Unbuffered
• 256MB (32 Meg x 64), 512MB (64 Meg x 64)
• Single +3.3V ±0.3V power supply
• Fully synchronous; all signals registered on positive
• Internal pipelined operation; column address can
• Internal SDRAM banks for hiding row access/
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge, including Concurrent Auto
• 64ms, 8,192 cycle Auto Refresh cycle
• Self Refresh Mode
• LVTTL-compatible inputs and outputs
• Serial Presence-Detect (SPD)
• Gold edge contacts
Table 1:
Table 2:
PDF: 09005aef807b3771/Source: 09005aef807b37b5
SD8_16C32_64x64AG.fm - Rev. D 3/05 EN
Refresh Count
Device Banks
Device Configuration
Row Addressing
Column Addressing
Module Ranks
Marking
Module
components
edge of system clock
be changed every clock cycle
precharge
Precharge, and Auto Refresh Modes
-13E
-133
-10E
Frequency
133 MHz
133 MHz
100 MHz
Timing Parameters
Address Table
Clock
Products and specifications discussed herein are subject to change by Micron without notice.
CL = 2
5.4ns
Access Time
9ns
CL = 3
5.4ns
7.5ns
256MB (x64, SR), 512MB (x64, DR) 168-Pin SDRAM UDIMM
Setup
Time
2ns
1.5
1.5
®
256Mb (32 Meg x 8)
Hold
Time
1ns
0.8
0.8
Web site:
4 (BA0, BA1)
8K (A0–A12)
1K (A0–A9)
1 (S0,S2)
256MB
8K
1
www.micron.com/products/modules
Figure 1:
Notes: 1. Consult Micron for product availability.
Options
• Package
• Operating Temperature Range
• Memory Clock/CAS Latency
• PCB
Low Profile 1.125in. (28.575mm)
168-pin DIMM (standard)
168-pin DIMM (lead-free)
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
(133 MHz)/CL = 2
(133 MHz)/CL = 3
(100 MHz)/CL = 2
Low profile 1.125in. (28.575mm)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. Industrial Temperature Option available in -
133 speed only.
168-Pin DIMM (MO–161)
256Mb (32 Meg x 8)
2 (S0,S2; S1,S3)
©2003 Micron Technology, Inc. All rights reserved.
4 (BA0, BA1)
8K (A0–A12)
1K (A0–A9)
512MB
8K
See page 2 note
Marking
Features
None
-10E
-13E
-133
I
Y
1, 2
G
1
1

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mt8lsdt3264ay-13e Summary of contents

Page 1

... MT16LSDT6464A(I) - 512MB For the latest data sheet, please refer to the Micron Features • PC100- and PC133-compliant • 168-pin, dual in-line memory module (DIMM) • Utilizes 125 MHz and 133 MHz SDRAM components • Unbuffered • 256MB (32 Meg x 64), 512MB (64 Meg x 64) • ...

Page 2

... Table 3: Part Numbers Part Number MT8LSDT3264AG-13E_ MT8LSDT3264AY-13E_ MT8LSDT3264A(I))G-133_ MT8LSDT3264A(I)Y-133_ MT8LSDT3264AG-10E_ MT8LSDT3264AY-10E_ MT16LSDT6464AAG-13E_ MT16LSDT6464AY-13E_ MT16LSDT6464A(I)G-133_ MT16LSDT6464A(I)Y-133_ MT16LSDT6464AG-10E_ MT16LSDT6464AY-10E_ Note: The designators for component and PCB revision are the last two characters of each part number. Consult factory for current revision codes. Example: MT8LSDT3264AG-133D2. ...

Page 3

... Figure 2: Pin Locations (168-Pin DIMM) Front View U1 U2 PIN 1 Back View (Populated only for dual rank, 512MB module) U11 U12 PIN 168 PDF: 09005aef807b3771/Source: 09005aef807b37b5 SD8_16C32_64x64AG.fm - Rev. D 3/05 EN 256MB (x64, SR), 512MB (x64, DR) 168-Pin SDRAM UDIMM Symbol Pin Symbol ...

Page 4

... The address inputs also provide the op-code during a MODE REGISTER SET command. SCL Input Serial Clock for Presence-Detect: SCL is used to synchronize the presence-detect data transfer to and from the module. SA0–SA2 Input Presence-Detect Address Inputs: These pins are used to configure the presence-detect device. ...

Page 5

... Description V Supply Power Supply: +3.3V ±0.3V Supply Ground – Not Connected: These pins are not connected on these modules. 5 Pin Assignments and Descriptions Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003 Micron Technology, Inc. All rights reserved. ...

Page 6

... Functional Block Diagram All resistor values are 10Ω unless otherwise specified. Per industry standard, Micron modules use various component speed grades as refer- enced in the module part numbering guide at: www.micron.com/numberguide. Standard modules use the following SDRAM device: MT48LC32M8A2TG; Lead-free modules use the following SDRAM device: MT48LC32M8A2P. Contact Micron for Indus- trial Temp ...

Page 7

Figure 4: Dual Rank S0# DQMB0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQMB1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 S2# DQMB2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQMB3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 ...

Page 8

... SDRAM modules incorporate serial presence-detect (SPD). The SPD function is imple- mented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes can be programmed by Micron to identify the module type and vari- ous SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer ...

Page 9

SDRAM requires a 100µs delay prior to issuing any command other than a COMMAND INHIBIT or NOP . Starting at some point during this 100µs period and continuing at least through the end of this period, Command Inhibit or NOP ...

Page 10

Figure 5: Mode Register Definition Diagram *Should program M12, M11, M10 = “0, 0, 0” to ensure compatibility with future devices. PDF: 09005aef807b3771/Source: 09005aef807b37b5 SD8_16C32_64x64AG.fm - Rev. D 3/05 EN 256MB (x64, SR), 512MB (x64, DR) 168-Pin SDRAM UDIMM A12 ...

Page 11

Table 7: Burst Definitions Burst Length Full Page Notes: 1. For full-page accesses 1,024 2. For a burst length of two, A1–A9 select the block of two burst; A0 selects the starting col- umn within the block. 3. ...

Page 12

Figure 6: CAS Latency Diagram CLK COMMAND DQ CLK COMMAND DQ Burst Type Accesses within a given burst may be programmed to be either sequential or interleaved; this is referred to as the burst type and is selected via bit ...

Page 13

Test modes and reserved states should not be used because unknown operation or incompatibility with future versions may result. Write Burst Mode When the burst length programmed via M0–M2 applies to both READ and WRITE bursts; when ...

Page 14

... OUT Output Low Voltage (I = 4mA) OUT Table 12: DC Electrical Characteristics and Operating Conditions – 512MB Module Notes notes appear on page 19; V Parameter/Condition SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs INPUT LEAKAGE CURRENT: Any input 0V ≤ ...

Page 15

... WRITE; All device banks active AUTO REFRESH CURRENT CKE = HIGH; CS# = HIGH SELF REFRESH CURRENT: CKE ≤ 0. Value calculated as one module bank in this condition, and all other module banks in power-down mode ( Value calculated reflects all module banks in this condition. PDF: 09005aef807b3771/Source: 09005aef807b37b5 SD8_16C32_64x64AG.fm - Rev. D 3/05 EN ...

Page 16

Table 15: Capacitance – 256MB Note 2; notes appear on page 19 Parameter Input Capacitance: Address and Command Input Capacitance: CK0 Input Capacitance: CK2 Input Capacitance: S0# Input Capacitance: S2# Input Capacitance: CKE Input Capacitance: DQMB0, 2– ...

Page 17

... Table 17: Electrical Characteristics and Recommended AC Operating Conditions Notes 11, 22; notes appear on page 19 Module AC timing parameters comply with PC100 and PC133 Design Specs, based on component parameters AC Characteristics Parameter Access timefrom CLK (pos.edge) CL=3 CL=2 Address hold time Address setup time CLK high-level width ...

Page 18

Table 18 Functional Characteristics Notes 11, 22; notes appear on page 19 Parameter READ/WRITE command to READ/WRITE command CKE to clock disable or power-down entry mode CKE to clock enable or power-down exit ...

Page 19

Notes 1. All voltages referenced This parameter is sampled MHz with minimum cycle time and the outputs open. 4. Enables on-chip refresh and address counters. 5. The minimum specifications ...

Page 20

... The value of 45ns. 32. Refer to device data sheet for timing waveforms. 33. Leakage number reflects the worst-case leakage possible through the module pin, not what each memory device contributes. PDF: 09005aef807b3771/Source: 09005aef807b37b5 SD8_16C32_64x64AG.fm - Rev. D 3/05 EN ...

Page 21

Serial Presence-Detect SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 7, Data Validity, ...

Page 22

Figure 8: Definition of Start and Stop SCL SDA Figure 9: Acknowledge Response From Receiver SCL from Master Data Output from Transmitter Data Output from Receiver PDF: 09005aef807b3771/Source: 09005aef807b37b5 SD8_16C32_64x64AG.fm - Rev. D 3/05 EN 256MB (x64, SR), 512MB (x64, ...

Page 23

Table 19: EEPROM Device Select Code The most significant bit (b7) is sent first Memory Area Select Code (two arrays) Protection Register Select Code Table 20: EEPROM Operating Modes Mode RW Bit Current Address Read RandomAddressRead Sequential Read Byte Write ...

Page 24

Table 21: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs OUTPUT LOW VOLTAGE 3mA OUT INPUT LEAKAGE CURRENT: ...

Page 25

... Byte Description 0 Number of Bytes Used by Micron 1 Total Number of SPD Memory Bytes 2 Memory Type 3 Number of Row Addresses 4 Number of Column Addresses 5 Number of Module Banks 6 Module Data Width 7 Module Data Width (Continued) 8 Module Voltage Interface Levels t 9 SDRAM Cycle Time, CK (CAS Latency = 3) 10 SDRAM Access from CLK, ...

Page 26

... RC 66ns (-133) 70ns (10E) REV. 1.2 (-13E) (-133) (-10E) MICRON 0 100 MHz (-13E/ -133/-10E) t RAS used for -13E modules is calculated from Micron Technology, Inc., reserves the right to change products or specifications without notice. 26 Serial Presence-Detect MT8LSDT3264A MT16LSDT6464A ...

Page 27

... Module Dimensions All dimensions are in inches (millimeters); Figure 11: 168-Pin Single Rank Module 0.079 (2.00) R (2X 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) PDF: 09005aef807b3771/Source: 09005aef807b37b5 SD8_16C32_64x64AG.fm - Rev. D 3/05 EN 256MB (x64, SR), 512MB (x64, DR) 168-Pin SDRAM UDIMM FRONT VIEW 5.256 (133.50) 5 ...

Page 28

... Figure 12: 168-Pin Dual Rank Module 0.079 (2.00) R (2X 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.118 (3.00) TYP 2.625 (66.68) PIN 1 U11 U12 PIN 168 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 prodmktg@micron.com www.micron.com Customer Comment Line: 800-932-4992 Micron, the M logo, and the Micron logo are trademarks of Micron Technology, Inc. ...

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