hys64t128020edv-2.5-c2 Qimonda, hys64t128020edv-2.5-c2 Datasheet - Page 4

• Manufacturer Part Number: hys64t128020edv-2.5-c2
• Description: 200-pin 1.5v Ddr2 Sdram So-dimm Modules So-dimm Sdram
• Manufacturer: Qimonda

1.2
The Qimonda HYS64T[128/256]020EDV–[25F/2.5/3S](–)C2
module family are Small-Outline DIMM modules “SO-DIMMs”
with 30 mm height based on DDR2 technology. DIMMs are
available as 128M × 64 (1GB), 256M × 64 (2GB) in
organization and density, intended for mounting into 200-pin
connector sockets.
1) For detailed information regarding Product Type of Qimonda please see chapter "Product Type Nomenclature" of this datasheet.
2) The Compliance Code is printed on the module label and describes the speed grade,
1) Green Product
2) For a detailed description of all functionalities of the DRAM components on these modules see the component data sheet.
Rev. 0.50, 2008-01
01242008-QE4B-HF08
Product Type
PC2-6400-555
HYS64T128020EDV-25FC2
HYS64T256020EDV-25FC2
PC2-6400-666
HYS64T128020EDV-2.5C2
HYS64T256020EDV-2.5C2
PC2-5300-555
HYS64T128020EDV-3S-C
HYS64T256020EDV-3S-C
DIMM
Density
1GB
2GB
Product Type
HYS64T128020EDV
HYS64T256020EDV
1)
1)2)
Module
Organization
128M × 64
256M × 64
Description
Compliance Code
1GB TBD
2GB TBD
1GB TBD
2GB TBD
1GB TBD
2GB TBD
DRAM Components
HYB15T1G160C2F
HYB15T1G800C2F
Memory
Ranks
2
2
2)
ECC/
Non-ECC
Non-ECC
Non-ECC
1)
4
Ordering Information for RoHS Compliant Products
The memory array is designed with 1 Gbit Double-Data-
Rate-Two (DDR2) Synchronous DRAMs.
capacitors are mounted on the PCB board. The DIMMs
feature serial presence detect based on a serial E
device using the 2-pin I
programmed with configuration data and are write protected;
the second 128 bytes are available to the customer.
8
16
# of SDRAMs # of row/bank/column
DRAM Density
1Gbit
1Gbit
HYS64T[128/256]020EDV–[25F/2.5/3S](–)C2
Description
2 Ranks, Non-ECC 1Gbit (×16)
2 Ranks, Non-ECC 1Gbit (×8)
2 Ranks, Non-ECC 1Gbit (×16)
2 Ranks, Non-ECC 1Gbit (×8)
2 Ranks, Non-ECC 1Gbit (×16)
2 Ranks, Non-ECC 1Gbit (×8)
Small Outline DDR2 SDRAM Modules
bits
13/3/10
14/3/10
2
C protocol. The first 128 bytes are
Advance Internet Data Sheet
Components on Modules
DRAM Organisation
64M × 16
128M × 8
SDRAM Technology
Address Format
TABLE 2
TABLE 3
TABLE 4
Decoupling
Raw
Card
A
F
2
PROM