hys64t128020eu-3s-b2 Qimonda, hys64t128020eu-3s-b2 Datasheet - Page 3

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hys64t128020eu-3s-b2

Manufacturer Part Number
hys64t128020eu-3s-b2
Description
240-pin Unbuffered Ddr2 Sdram Modules Udimm Sdram
Manufacturer
Qimonda
Datasheet
1
This chapter gives an overview of the 240-pin Unbuffered DDR2 SDRAM modules product family and describes its main
characteristics.
1.1
• 240-Pin PC2-6400, PC2-5300 and PC2-4200 DDR2
• Two ranks 128M × 64, 128M × 72, and one rank 32M × 64,
• 1GB, 512MB, 256MB Modules built with 512Mbit DDR2
• Standard Double-Data-Rate-Two Synchronous DRAMs
• All speed grades faster than DDR2-400 comply with
• Programmable CAS Latencies (3, 4, 5 and 6 ), Burst
1) Product released after 01-08-2007 will support
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
Rev. 1.01, 2008-01
10202006-L0SM-FEYT
QAG Speed Code
DRAM Speed Grade
Module Speed Grade
CAS-RCD-RP latencies
Max.
Clock Frequency
Min. RAS-CAS-Delay
Min. Row Precharge Time
Min. Row Active Time
Min. Row Cycle Time
SDRAM memory modules.
64M × 64, 64M × 72 module organization, and 32M × 16,
64M × 8 chip organization
SDRAMs in P-TFBGA-60 and PG-TFBGA-84 chipsize
packages.
(DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power
supply.
DDR2-400 timing specifications.
Length (8 & 4).
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Features
1)
CL3
CL4
CL5
CL6
Overview
DDR2
PC2
f
f
f
f
t
t
t
t
CK3
CK4
CK5
CK6
RCD
RP
RAS
RC
–25F
–800D
–6400D
5–5–5
200
266
400
12.5
12.5
45
57.5
t
RAS
= 40 ns for all DDR2 speed sort.
–2.5
–800E
–6400E
6–6–6
200
266
333
400
15
15
45
60
3
• Auto Refresh (CBR) and Self Refresh.
• Auto Refresh for temperatures above 85 °C
• Programmable self refresh rate via EMRS2 setting.
• Programmable partial array refresh via EMRS2 settings.
• DCC enabling via EMRS2 setting.
• All inputs and outputs SSTL_1.8 compatible.
• Off-Chip Driver Impedance Adjustment (OCD) and On-Die
• Serial Presence Detect with E
• UDIMM and EDIMM Dimensions (nominal): 30 mm high,
• Based on standard reference layouts Raw Cards 'C', 'D',
• RoHS compliant products
HYS[64/72]T[32/64/128]xxxEU-[25F/2.5/3/3S/3.7]-B2
Termination (ODT).
133.35 mm wide.
'E', ’F' and 'G'
–667C
–5300C
4–4–4
200
333
333
12
12
45
57
–3
Unbuffered DDR2 SDRAM Module
–667D
5–5–5
–3S
–5300D
200
266
333
15
15
45
60
1)
2
PROM
4–4–4
–3.7
–533C
–4200C
200
266
266
15
15
45
60
Performance Table
Internet Data Sheet
TABLE 1
t
REFI
Unit
t
MHz
MHz
MHz
MHz
ns
ns
ns
ns
CK
= 3.9 µs.

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