hys64t128020eu-3s-b2 Qimonda, hys64t128020eu-3s-b2 Datasheet - Page 4

• Manufacturer Part Number: hys64t128020eu-3s-b2
• Description: 240-pin Unbuffered Ddr2 Sdram Modules Udimm Sdram
• Manufacturer: Qimonda

1.2
The
[25F/2.5/3/3S/3.7]-B2 module family are Unbuffered DIMM
modules “UDIMMs” with 30 mm height based on DDR2
technology.
DIMMs
128M × 72 (1GB), 32M × 64 (256MB), 64M × 64 (512MB)
and
64M × 72 (512MB) in organization and density, intended for
mounting into 240-pin connector sockets.
Rev. 1.01, 2008-01
10202006-L0SM-FEYT
Product Type
PC2-6400 (5-5-5)
HYS72T128920EU–25F–B2
HYS64T128920EU–25F–B2
HYS72T128020EU–25F–B2
HYS64T128020EU–25F–B2
HYS72T64900EU–25F–B2
HYS64T64900EU–25F–B2
HYS72T64000EU–25F–B2
HYS64T64000EU–25F–B2
HYS64T32900EU–25F–B2
HYS64T32000EU–25F–B2
PC2-6400 (6-6-6)
HYS72T128920EU–2.5–B2
HYS64T128920EU–2.5–B2
HYS72T128020EU–2.5–B2
HYS64T128020EU–2.5–B2
HYS72T64900EU–2.5–B2
HYS64T64900EU–2.5–B2
HYS72T64000EU–2.5–B2
HYS64T64000EU–2.5–B2
HYS64T32900EU–2.5–B2
HYS64T32000EU–2.5–B2
PC2-5300 (4-4-4)
HYS72T128920EU–3–B2
HYS64T128920EU–3–B2
HYS72T128020EU–3–B2
as
are
Qimonda
ECC
1)
available
Description
modules
as
HYS[64/72]T[32/64/128]xxxEU-
non-ECC
Compliance Code
1GB 2R×8 PC2–6400E–555–12–G0
1GB 2R×8 PC2–6400U–555–12–E0
1GB 2R×8 PC2–6400E–555–12–G0
1GB 2R×8 PC2–6400U–555–12–E0
512MB 1R×8 PC2–6400E–555–12–F0
512MB 1R×8 PC2–6400U–555–12–D0
512MB 1R×8 PC2–6400E–555–12–F0
512MB 1R×8 PC2–6400U–555–12–D0
256MB 1R×16 PC2–6400U–555–12–C1
256MB 1R×16 PC2–6400U–555–12–C1
1GB 2R×8 PC2–6400E–666–12–G0
1GB 2R×8 PC2–6400U–666–12–E0
1GB 2R×8 PC2–6400E–666–12–G0
1GB 2R×8 PC2–6400U–666–12–E0
512MB 1R×8 PC2–6400E–666–12–F0
512MB 1R×8 PC2–6400U–666–12–D0
512MB 1R×8 PC2–6400E–666–12–F0
512MB 1R×8 PC2–6400U–666–12–D0
256MB 1R×16 PC2–6400U–666–12–C1
256MB 1R×16 PC2–6400U–666–12–C1
1GB 2R×8 PC2–5300E–444–12–G0
1GB 2R×8 PC2–5300U–444–12–E0
1GB 2R×8 PC2–5300E–444–12–G0
in
128M × 72 (1GB),
modules
2)
in
4
The memory array is designed with 512Mbit Double-Data-
Rate-Two (DDR2) Synchronous DRAMs.
capacitors are mounted on the PCB board. The DIMMs
feature serial presence detect based on a serial E
device using the 2-pin I
programmed with configuration data and are write protected;
the second 128 bytes are available to the customer.
HYS[64/72]T[32/64/128]xxxEU-[25F/2.5/3/3S/3.7]-B2
Description
2 Ranks, Non-ECC 512Mbit (×8)
2 Ranks, Non-ECC 512Mbit (×8)
2 Ranks, Non-ECC 512Mbit (×8)
2 Ranks, Non-ECC 512Mbit (×8)
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
2 Ranks, Non-ECC 512Mbit (×8)
2 Ranks, Non-ECC 512Mbit (×8)
2 Ranks, Non-ECC 512Mbit (×8)
2 Ranks, Non-ECC 512Mbit (×8)
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
1 Rank, Non-ECC
2 Ranks, Non-ECC 512Mbit (×8)
2 Ranks, Non-ECC 512Mbit (×8)
2 Ranks, Non-ECC 512Mbit (×8)
Unbuffered DDR2 SDRAM Module
2
C protocol. The first 128 bytes are
Ordering Information
SDRAM Technology
512Mbit (×8)
512Mbit (×8)
512Mbit (×8)
512Mbit (×8)
512Mbit (×16)
512Mbit (×16)
512Mbit (×8)
512Mbit (×8)
512Mbit (×8)
512Mbit (×8)
512Mbit (×16)
512Mbit (×16)
Internet Data Sheet
TABLE 2
Decoupling
2
PROM