hys64t128020eu-3s-b2 Qimonda, hys64t128020eu-3s-b2 Datasheet - Page 7

• Manufacturer Part Number: hys64t128020eu-3s-b2
• Description: 240-pin Unbuffered Ddr2 Sdram Modules Udimm Sdram
• Manufacturer: Qimonda

2
2.1
The pin configuration of the Unbuffered DDR2 SDRAM DIMM is listed by function in
in columns Pin and Buffer Type are explained in
for non-ECC modules (×64) and
Rev. 1.01, 2008-01
10202006-L0SM-FEYT
Ball No.
Clock Signals
185
137
220
186
138
221
52
171
Control Signals
193
76
192
74
Name
CK0
CK1
CK2
CK0
CK1
CK2
CKE0
CKE1
NC
S0
S1
NC
RAS
CAS
Pin Configurations
Pin Configurations
Pin
Type
I
I
I
I
I
I
I
I
NC
I
I
NC
I
I
Figure 2
Buffer
Type
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
—
SSTL
SSTL
—
SSTL
SSTL
for ECC modules (×72).
Function
Clock Signals 2:0, Complement Clock Signals 2:0
The system clock inputs. All address and command lines are sampled on the
cross point of the rising edge of CK and the falling edge of CK. A Delay
Locked Loop (DLL) circuit is driven from the clock inputs and output timing for
read operations is synchronized to the input clock.
Clock Enable Rank 1:0
Activates the DDR2 SDRAM CK signal when HIGH and deactivates the CK
signal when LOW. By deactivating the clocks, CKE LOW initiates the Power
Down Mode or the Self Refresh Mode.
Note: 2 Ranks module
Not Connected
Note: 1 Rank module
Chip Select Rank 1:0
Enables the associated DDR2 SDRAM command decoder when LOW and
disables the command decoder when HIGH. When the command decoder is
disabled, new commands are ignored but previous operations continue. Rank
0 is selected by S0; Rank 1 is selected by S1. Ranks are also called "Physical
banks".
Note: 2 Ranks module
Not Connected
Note: 1 Rank module
Row Address Strobe
When sampled at the cross point of the rising edge of CK,and falling edge of
CK, RAS, CAS and WE define the operation to be executed by the SDRAM.
Column Address Strobe
Table 6
and
Table 7
7
HYS[64/72]T[32/64/128]xxxEU-[25F/2.5/3/3S/3.7]-B2
respectively. The pin numbering is depicted in
Table 5
Unbuffered DDR2 SDRAM Module
(240 pins). The abbreviations used
Pin Configuration of UDIMM
Internet Data Sheet
TABLE 5
Figure 1