hys64t128020emv-2.5c2 Qimonda, hys64t128020emv-2.5c2 Datasheet - Page 14

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hys64t128020emv-2.5c2

Manufacturer Part Number
hys64t128020emv-2.5c2
Description
214-pin 1.5v Unbuffered Ddr2 Sdram Microdimm Modules Mdimm Sdram
Manufacturer
Qimonda
Datasheet
1) Operating Temperature is the case surface temperature on the center / top side of the DRAM.
2) The operating temperature range are the temperatures where all DRAM specification will be supported. During operation, the DRAM case
3) Above 85 °C the Auto-Refresh command interval has to be reduced to
4) When operating this product in the 85 °C to 95 °C T
3.2
1) Under all conditions,
2) Peak to peak AC noise on
3) Input voltage for any connector pin under test of 0 V ≤
Rev. 1.00, 2008-06
01242008-CDK4-KSK6
Parameter
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
SPD Supply Voltage
DC Input Logic High
DC Input Logic Low
AC Input Logic High
AC Input Logic Low
In / Output Leakage Current
temperature must be maintained between 0 - 95 °C under all other specification parameters.
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of
Operating Conditions
V
DDQ
must be less than or equal to
V
REF
may not exceed ± 2%
Symbol
V
V
V
V
V
V
V
V
I
L
DD
DDQ
REF
DDSPD
IH(DC)
IL (DC
IH(AC)
IL (AC
)
)
CASE
Values
Min.
1.45
1.45
0.49 ×
1.7
V
– 0.30
V
V
– 5
V
V
REF
REF
SSQ
REF
IN
V
temperature range, the High Temperature Self Refresh has to be enabled by
DD
Supply Voltage Levels and AC / DC Operating Conditions
+ 0.125
+ 0.200
– V
(DC).
V
V
DDQ
DDQ
PEAK
14
V
+ 0.3 V; all other pins at 0 V. Current is per pin
REF
is also expected to track noise in
t
REFI
Typ.
1.5
1.5
0.5 ×
= 3.9 μs
Unbuffered DDR2 SDRAM MicroDIMM Modules
V
DDQ
HYS64T128020EMV–[2.5/3S](–)C2
Max.
1.9
1.9
0.51 ×
3.6
V
V
V
V
5
DDQ
REF
DDQ
REF
– 0.125
–0.200
+ 0.3
+ V
V
DDQ
V
PEAK
I
DDQ
DD6
.
by approximately 50%
Internet Data Sheet
Unit
V
V
V
V
V
V
V
V
μA
TABLE 11
Note
1)
2)
3)

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