saa5281 NXP Semiconductors, saa5281 Datasheet

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saa5281

Manufacturer Part Number
saa5281
Description
Integrated Video Input Processor And Teletext Decoder Ivt1.8
Manufacturer
NXP Semiconductors
Datasheet

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Preliminary specification
Supersedes data of June 1994
File under Integrated Circuits, IC02
DATA SHEET
SAA5281
Integrated Video input processor
and Teletext decoder (IVT1.8*)
INTEGRATED CIRCUITS
1996 Nov 04

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saa5281 Summary of contents

Page 1

... DATA SHEET SAA5281 Integrated Video input processor and Teletext decoder (IVT1.8*) Preliminary specification Supersedes data of June 1994 File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 1996 Nov 04 ...

Page 2

... Preliminary specification 8 DRAM is included on-chip for up to MIN. TYP. MAX. 4.5 5.0 5.5 75 150 0.1 0.3 0.6 0.7 1.0 1 +70 20 2.8 mm SAA5281 UNIT MHz C VERSION SOT240-1 SOT247-1 SOT319-2 ...

Page 3

... Preliminary specification DRAM REFRESH DRAM AND TIMING MEMORY INTERFACE C-BUS 23 INTERFACE 44 TIMING CHAIN DISPLAY CLOCK PHASE-LOCKED 13 LOOP 11 37 ANALOG 27 MHz 4 OUTPUT CLOCK BUFFER GENERATOR STTV/LFB CLK EN OSCIN OSCOUT SAA5281 SDA SCL LINE 23 VCR/FFB POL CLK O/P OSCGND MBD783 ...

Page 4

... I power-down of the device 25 40 serial data port for the I driven HIGH during power-down of the device ground 4 Preliminary specification SAA5281 DESCRIPTION for normal operation SS1 2 C-bus; it can still be driven HIGH during 2 C-bus, open-drain output; it can still be ...

Page 5

... O/P pin 37); internal pull-down normally disables clock 40 59 13.5 MHz clock output to drive an external microcontroller 47 4 output for indication of Line 23 for use with external circuitry 9, 10, 12, not connected; normally open-circuit 17, 25, 26, 29, 31 43, 54, 57, 58, 60 Preliminary specification SAA5281 DESCRIPTION ...

Page 6

... OSCIN i.c. OSCGND SS1 i. SS1 5 48 i.c. LINE 23 REF i.c. n.c. 7 i.c. BLACK 8 45 i.c. CVBS i.c. IREF V DD2 i. POL 41 i.c. SAA5281 CLK O/P STTV/LFB 40 13 VCR/FFB 14 39 CLK EN V SS2 i.c. RGBREF 19 n.c. 34 BLAN 20 33 n.c. 32 COR 21 i.c. ODD/EVEN 22 31 i.c. ...

Page 7

... V DD1 11 n.c. 12 OSCOUT 13 OSCIN 14 OSCGND 15 V SS1 16 17 n.c. 18 REF BLACK 19 1996 Nov 04 SAA5281 Fig.4 Pin configuration; SOT319-2 (QFP64). 7 Preliminary specification SAA5281 51 i.c. 50 i.c. 49 i.c. 48 i.c. 47 i.c. 46 i.c. 45 i.c. V SS3 44 n. n.c. 41 n.c. 40 SDA 39 SCL 38 Y ODD/EVEN 37 (or DV) 36 COR 35 BLAN ...

Page 8

... T stg(min) stg(max) CONDITIONS ESD Human body model 2000 V, 100 pF, 1.5 k ESD Machine model 200 V, 200 pF, 0 latch-up 100 mA, 1 (absolute maximum) 8 Preliminary specification SAA5281 (1) (1) (1) REQUIREMENTS 1500 FPM; equivalent to 100 FITS 2000 FPM 2000 FPM (1) REQUIREMENTS 15% LTPD ...

Page 9

... PLL capture range Z source impedance source V input switching voltage level of I sync separator Z input impedance I C input capacitance I IREF R resistor to ground gnd V input voltage i 1996 Nov 04 PARAMETER CONDITIONS 9 Preliminary specification SAA5281 MIN. MAX. 0.3 +6.5 0 0 +70 MIN. TYP. MAX. 4.5 5.0 5.5 75 150 0.1 ...

Page 10

... I DD note 1 1 0.3 2 note 0.3 3 between 10% and 90% between 90% and 10% 5.0 10 Preliminary specification SAA5281 TYP. MAX. UNIT + tbf 0 + 250 ...

Page 11

... V and 1.6 mA RGBREF DD note 2 between 10% and 90% between 90% and between 10% and 90% between 90% and 10% 11 Preliminary specification SAA5281 MIN. TYP. MAX. 100 1.8 2.15 2.5 10 +10 0.3 +1 0.5 10 +10 10 400 2 2 200 0.9 1.0 1.1 0.2 0.3 ...

Page 12

... OH between 0.6 V and 2.2 V between 0.6 V and 2 load resistor of 1 measured DD between V 0 and 1 not exceeded Preliminary specification SAA5281 MIN. TYP. MAX. 0 0 120 0 +10 20 4.0 4.0 250 170 4 ...

Page 13

... SU;STA 2 Fig.5 I C-bus timing. display period 16.67 lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced) display period 41 Fig.6 Display output timing (a) line rate (b) field rate. 13 Preliminary specification HIGH t HD;DAT t SU;DAT t SU;STO 40 s 56.67 s 291 line numbers SAA5281 64 s 312 MLA662 - 1 ...

Page 14

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) 1996 Nov 04 14 Preliminary specification SAA5281 pagewidth full handbook, ...

Page 15

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) 1996 Nov 04 15 Preliminary specification SAA5281 pagewidth full handbook, ...

Page 16

... VPS data page information Fig.9 Basic page memory organization. Row 25 The first 10 bytes of row 25 contain control data relating to the received page as shown in Table 5. The remaining 14 bytes are free for use by the microcomputer. 16 Preliminary specification SAA5281 8 characters always rolling (time) ROW ...

Page 17

... HU0 MU1 MT1 HU1 MU2 MT2 HU2 MU3 C4 HU3 Preliminary specification HT0 C7 C11 HT1 C8 C12 C5 C9 C13 C6 C10 C14 SAA5281 MAG0 0 MAG1 0 MAG2 PBLF ...

Page 18

... Chapter 6 Row 23. handbook, full pagewidth (1) Row 25 reserved for VPS data in Chapter 5. 1996 Nov 04 PACKETS X/26/0 to X/26/14 PACKET X/28/2 PACKETS X/27/0 to X/27/1 PACKETS X/27/4 to X/27/5 PACKET X/24 IF R0D7 = 0 PACKET X/25 PACKET X/28/0 PACKET 8/30 PACKET X/28/1 (1) RESERVED Fig.10 Organization of the extension memory. 18 Preliminary specification SAA5281 ROW MBD791 ...

Page 19

... CHAPTER 4 PACKETS CHAPTER 5 PACKET 24 CHAPTER 5 PACKETS CHAPTER 6 PACKET 24 CHAPTER 6 PACKETS not used not used PACKETS 0,1 PACKETS 2,3 PACKETS not used 19 Preliminary specification ROW MBD788 SAA5281 ...

Page 20

... B5 Fig.12 Detailed memory organization. 20 Preliminary specification B11 B12 B13 B14 B15 MBD787 SAA5281 2 C-bus 19 19 ...

Page 21

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) 1996 Nov 04 21 Preliminary specification SAA5281 ...

Page 22

... Hz status messages when logic 1. Start column for page request data (see Table 11). Must be logic 0 for normal operation. Selects one of four acquisition circuits. Selects bank of four pages being addressed for acquisition. 8/4 Hamming check packet 27 and 8/30 data. See Table 11. 22 Preliminary specification SAA5281 FUNCTION ...

Page 23

... Indicated language/ROM variant. For Western European is logic 0. R3 and R4 are set HIGH if R13 D6 is logic 1. If the input video is a 525 line signal then logic 1. Each acquisition channel can be programmed to process its page in one of four ways as shown in Table 12. 23 Preliminary specification SAA5281 FUNCTION 2 C-bus. 2 C-bus. 2 C-bus ...

Page 24

... SCS (scan composite sync) mode: FFB leading edge in first broad pulse of field SCS (scan composite sync) mode: FFB leading edge in second broad pulse of field 24 Preliminary specification SAA5281 FUNCTION RESULT RESULT ...

Page 25

... Hamming check for whole page mixed 8/4 Hamming (columns 27) and 7-bit + parity (columns 39) 25 Preliminary specification PRD2 PRD1 MAG1 PT1 PU1 HT1 HU1 MT1 MU1 CH1 SAA5281 PRD0 MAG0 PT0 PU0 HT0 HU0 MT0 MU0 CH0 ...

Page 26

... Fig.13. The crystal characteristics are given in Table 13. V DD1 1 OSCOUT 8.2 pF 100 nF 3.3 H OSCIN 27 MHz 3rd overtone OSCGND 4 PARAMETER 26 Preliminary specification SAA5281 (52) (1) CRYSTAL OSCILLATOR 3 (2) (3) MBD786 TYP. MAX. 1.7 5 SAA5281 UNIT year ...

Page 27

... Normally at zero, compatibility with IVT1.0 is maintained. alphanumerics or alphanumerics blast-through character alphanumerics 1011010 character 0001001 separated separated graphics character graphics character 0110111 1111111 background = colour Fig.14 Character format. 27 Preliminary specification SAA5281 MLA663 alphanumerics character 1111111 contiguous graphics character 1111111 display = colour ...

Page 28

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 14 SAA5281P/E character data input decoding, West European languages; notes For character version number (11000) see Register 11B. handbook, full pagewidth ...

Page 29

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 15 SAA5281P/H character data input decoding, East European languages; notes For character version number (11001) see Register 11B. handbook, full pagewidth ...

Page 30

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 16 SAA5281P/T character data input decoding, West European and Turkish languages; notes For character version number (11010) see Register 11B. handbook, full pagewidth ...

Page 31

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 17 SAA5281P/R character data input decoding, Baltic and Cyrillic languages; notes For character version number (00101) see Register 11B ...

Page 32

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 18 SAA5281P/L character data input decoding, Arabic and Hebrew languages; notes For character version number (00100) see Register 11B ...

Page 33

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 19 SAA5281P/K character data input decoding, French and Arabic languages; notes For character version number (00100) see Register 11B ...

Page 34

... Characters may be referred to by column and row (for example 2/5 refers to %). 5. Black represents displayed colour. White represents background. 6. The SAA5281 national option characters are illustrated in Tables 21, 22 and 23. 7. Characters 8/6, 8/7, 9/5, 9/6 and 9/7 are special characters for combining with character 8/5 (E, H and T codes only). ...

Page 35

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) 1996 Nov 04 35 Preliminary specification SAA5281 pagewidth full ...

Page 36

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 21 SAA5281P/E national option character set handbook, full pagewidth PHCB LANGUAGE C12 C13 C14 ENGLISH 0 0 GERMAN SWEDISH 0 1 ITALIAN 1 0 FRENCH 1 0 SPANISH (1) PHCB are the Page Header Control Bits. Other combinations default to English. ...

Page 37

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 23 SAA5281P/T national option character set andbook, full pagewidth PHCB LANGUAGE C12 C13 C14 ENGLISH 0 0 GERMAN TURKISH 0 1 ITALIAN 1 0 FRENCH 1 0 SPANISH (1) PHCB are the Page Header Control Bits. Other combinations default to English. Only the above characters change with the PHCB. All other characters in the basic set are shown in Table 20 ...

Page 38

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 24 SAA5281P/R national option character set handbook, full pagewidth PHCB LANGUAGE C12 C13 C14 ESTONIAN 0 1 LETTISH / 0 1 LITHUANIAN 1 0 RUSSIAN (1) PHCB are the Page Header Control Bits. Other combinations default to Estonian. ...

Page 39

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 25 SAA5281P/K national option character set handbook, full pagewidth LANGUAGE (1) PHCB (C12, C13, C14) (1) PHCB are the Page Header Control Bits. Other combinations default to French. ...

Page 40

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) Table 26 SAA5281P/L national option character set handbook, full pagewidth LANGUAGE (1) PHCB (C12, C13, C14) (1) PHCB are the Page Header Control Bits. Other combinations default to Hebrew English. ...

Page 41

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) APPLICATION INFORMATION 1996 Nov 04 41 Preliminary specification SAA5281 ...

Page 42

... 1.4 0.53 0.36 62.60 14.22 1.14 0.38 0.23 61.60 13.56 0.055 0.021 0.014 2.46 0.56 0.045 0.015 0.009 2.42 0.53 REFERENCES JEDEC EIAJ 42 Preliminary specification 3.90 15.88 18.46 2.54 15.24 3.05 15.24 15.24 0.15 0.63 0.10 0.60 0.12 0.60 EUROPEAN PROJECTION SAA5281 SOT240 ( max. 0.254 2.1 0.73 0.01 0.083 0.60 ISSUE DATE 92-11-17 95-01-25 ...

Page 43

... SOT247-1 1996 Nov scale (1) ( 1.3 0.53 0.32 47.9 14.0 0.8 0.40 0.23 47.1 13.7 REFERENCES JEDEC EIAJ 43 Preliminary specification 3.2 15.80 17.15 1.778 15.24 2.8 15.24 15.90 EUROPEAN PROJECTION SAA5281 SOT247 ( max. 0.18 1.73 ISSUE DATE 90-01-22 95-03-11 ...

Page 44

... 0.50 0.25 20.1 14.1 24.2 1 0.35 0.14 19.9 13.9 23.6 REFERENCES JEDEC EIAJ 44 Preliminary specification 18.2 1.0 1.4 1.95 0.2 0.2 17.6 0.6 1.2 EUROPEAN PROJECTION SAA5281 SOT319 detail X (1) ( 1.2 1.2 7 0.1 o 0.8 0.8 0 ISSUE DATE 92-11-17 95-02-04 ...

Page 45

... If the bit temperature is between 300 and 400 C, contact may seconds components conveys a license under the Philips’ system provided the system conforms to the I 45 Preliminary specification SAA5281 ). If the stg max 2 C patent to use the 2 C specification defined by ...

Page 46

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) 1996 Nov 04 NOTES 46 Preliminary specification SAA5281 ...

Page 47

... Philips Semiconductors Integrated Video input processor and Teletext decoder (IVT1.8*) 1996 Nov 04 NOTES 47 Preliminary specification SAA5281 ...

Page 48

Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + ...

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