atr0620 ATMEL Corporation, atr0620 Datasheet
atr0620
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atr0620 Summary of contents
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... Timer with a 8-bit Fractional Part of a Second and Parallel Load • 2.3V to 3.6V or 1.8V Supply Voltage • Includes Power Supervisor • Battery Backup Memory • × 100-pin BGA Package ® Processor Core GPS Baseband Processor ATR0620 Summary Preliminary Rev. 4574CS–GPS–05/05 ...
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... The ATR0620 is manufactured using Atmel’s high-density CMOS technology. By combining the ARM7TDMI microcontroller core with on-chip SRAM, 16-channel GPS correlator and a wide range of peripheral functions on a monolithic chip, the ATR0620 provides a highly flexible and cost-effective solution for GPS applications. ATR0620 [Preliminary] 2 4574CS– ...
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... P7/NUB/NWR1 P6/NOE/NRD P5/NWE/NWR0 P4/nCS0 P3/nCS1 P2/BOOT_MODE1 EM_A19 EM_A1 EM_DA15 EM_DA0 DBG_EN TEST_MODE nTRST TDI TDO TCK TMS nRESET 4574CS–GPS–05/05 ATR0620 [Preliminary] P29/GPSMODE10 P27/GPSMODE7 P26/GPSMODE5 P25/GPSMODE3 P24/GPSMODE2 P23/GPSMODE4 P20/TIMEPULSE P19/GPSMODE9 P17/GPSMODE1 P14/GPSMODE0 P13/GPSMODE11 P12/GPSMODE8 P1/GPSMODE6 SIGLO SIGHI CLK23 P21/TXD2 P22/RXD2 ...
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... N10 L14 Note selection option for PIO. ATR0620 [Preliminary] 4 Firmware Pin Name Label EM_DA0 (1) EM_DA1 (1) EM_DA2 (1) EM_DA3 (1) EM_DA4 (1) EM_DA5 (1) EM_DA6 (1) EM_DA7 (1) EM_DA8 (1) EM_DA9 (1) EM_DA10 (1) EM_DA11 (1) EM_DA12 (1) EM_DA13 ...
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... LDO_IN (1) P7 (OH) NUB/NWR1 P10 (OH) EM_A0/NLB P11 EM_A21 EXTINT2 P8 OUT (RFU) P16 NWD_OVF SIGHI2 P19 GPSMODE6 SIGLO2 P1 GPSMODE0 LDOBAT_IN (1) P21 TXD2 P22 RXD2 RXD2 ATR0620 [Preliminary] PIO Bank A PIO Bank (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) ...
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... C2 132 (1) B14 133 (1) C11 134 (1) A12 135 (1) A11 136 (1) A10 137 (1) A8 Note selection option for PIO. ATR0620 [Preliminary] 6 Firmware Pin Name Label P20 1PPS SCK2 P27 GPSMODE11 P28 EM_A20 P29 GPSMODE12 P12 GPSMODE2 P13 GPSMODE3 EXTINT1 VBAT18_O (1) VBAT18_I ...
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... TMON26 (1) POR_VEXT (1) Type Output I/O I/O I/O I/O I/O I/O I/O I/O Output I/O I/O I/O I/O I/O I/O I/O Output – Output I/O Input Output I/O I/O I/O I/O I/O I/O ATR0620 [Preliminary] PIO Bank A PIO Bank (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) Active Level Comment – All valid after reset – – Low – Low ...
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... LDO_IN LDO in LDO LDO_OUT LDO out LDO_EN LDO enable TEST_MODE Test mode select POR_VEXT Test input TEST TMON0-26 Test monitor output TOUT1/APB_Select Test output ATR0620 [Preliminary] 8 Type Active Level Comment I/O – PIO-controlled after reset Input – – Input – – Input – ...
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... The ARM standard In-Circuit Emulation (ICE) debug interface is supported via the ICE port of the ATR0620. 3. PDC2 The ATR0620 has an 8-channel PDC2 dedicated to the three on-chip USARTs and to the SPI. One PDC2 channel is connected to the receiving channel and one to the transmitting channel of each peripheral. ...
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... External sources can be programmed to be positive or negative edge triggered or high- or low- level sensitive. 6. PIO2: Parallel I/O Controller The ATR0620 features 32 programmable I/O lines. The I/O lines are multiplexed with on-chip peripheral I/O signals in order to optimize the use of available package pins. The PIO2 controller provides an internal interrupt signal to the Advanced Interrupt Controller (AIC). ...
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... SPI without CPU intervention for maximum real-time processing throughput. 9. WD: Watchdog Timer The ATR0620 features an internal watchdog timer, which can be used to guard against system lock-up if the software becomes trapped in a deadlock. The watchdog timer can be programmed to generate an interrupt or an internal reset. ...
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... The GPS correlator processes GPS signal data to acquire the GPS satellite signals using a model of the satellite codes and multiply/accumulate circuits (correlators) to spread the signal to a bandwidth low enough to detect it above thermal noise. 16. GPS Accelerator The ATR0620 features an accelerator which reduces the time to identify the correct GPS signal. ATR0620 [Preliminary ...
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... Package Remarks CTBGA100 9 mm × 9 mm, 0.80 mm pitch CPGA144 Debug package TOP VIEW SIDE VIEW 1.10 ± 0.10 9.00 ± 0.05 0.30 ± 0.05 BOTTOM VIEW A1 BALL PAD CORNER 0.90 ± 0.05 0.80 ± 0.05 ATR0620 [Preliminary] 0.40 Dia. TYP 0.60 ± 0.05 13 ...
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... Package CPGA144 TOP VIEW 1.575 ± 0.16 BOTTOM VIEW 1.400 ± 0.012 0.100 TYP ATR0620 [Preliminary SIDE VIEW 0.090 ± 0.009 0.018 ± 0.002 4574CS–GPS–05/05 ...
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... Atmel does not make any commitment to update the information contained herein. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © Atmel Corporation 2005. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...