ace24c32 ACE Technology Co., LTD., ace24c32 Datasheet
ace24c32
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ace24c32 Summary of contents
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... Description The ACE24C32/64 provides 32,768/65,536 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device’s cascadable feature allows devices to share a common two-wire bus ...
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... Packaging Type Pin Configurations Pin Name Function A0~A2 Device Address Inputs SDA Serial Data Input / Output SCL Serial Clock Input WP Write Protect VCC Power Supply GND Ground Technology ACE24C32/64 Two-wire Serial EEPROM VER 1.3 2 ...
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... Block Diagram Technology Figure 1 ACE24C32/64 Two-wire Serial EEPROM VER 1.3 3 ...
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... GND. Write Protect (WP): The ACE24C32/64 has a Write Provides hardware data protection. The WP pin allows normal write operations when connected to ground (GND). When the Write Protect pin is connected to Vcc. All write operations to the memory are inhibited. If the pin is left floating, the WP pin will be internally pulled is < 3pF , if coupling is > ...
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... Memory Organization ACE24C32, 32K Serial EEPROM: Internally organized with 128 pages of 32 bytes each, the 32K requires a 12-bit data word address for random word addressing ...
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... The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (refer to Figure 4). Data changes during SCL high periods will indicate a start or stop condition as defined below. Technology Parameter ACE24C32/64 Two-wire Serial EEPROM 1.7-volt 2.5-volt 5.5-volt ...
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... EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. Standby Mode : The ACE24C32/64 features a low-power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the stop bit and the completion of any internal operations. Memory Reset : ...
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... Figure 3．SCL: Serial Clock, SDA: Serial Data I/O Note: The write cycle time t is the time from a valid stop condition of a write sequence to the end of the internal clear/write WR cycle. Figure 5．Start and Stop Definition Figure 6．Output Acknowledge Technology Figure 4．Data Validity ACE24C32/64 Two-wire Serial EEPROM VER 1.3 8 ...
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... Special internal circuitry place on the SDA and SCL pins prevent small noise spikes from activating the device. Date Security: The ACE24C32/64 has a hardware data protection scheme that allows the user to write protect the entire memory when the WP pin is at Vcc. Write Operations ...
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... The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (refer to Figure 12 MSB Figure 7．Device Address Technology ACE24C32/64 Two-wire Serial EEPROM R/W LSB VER 1.3 10 ...
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... Figure 10．Current Address Read Technology Figure 8．Byte Write Figure 9．Page Write ACE24C32/64 Two-wire Serial EEPROM VER 1.3 11 ...
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... Figure 12． Sequential Read Technology Figure 11． Random Read ACE24C32/64 Two-wire Serial EEPROM VER 1.3 12 ...
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... Packaging information PDIP-8 Note: Dimensions in Millimeters. Technology ACE24C32/64 Two-wire Serial EEPROM VER 1.3 13 ...
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... SOP-8 Note: Dimensions in Millimeters. Technology ACE24C32/64 Two-wire Serial EEPROM VER 1.3 14 ...
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... TSSOP-8 Note: Dimensions in Millimeters. Technology ACE24C32/64 Two-wire Serial EEPROM VER 1.3 15 ...
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... A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness. Technology Notes ACE Technology Co., LTD. http://www.ace-ele.com/ ACE24C32/64 Two-wire Serial EEPROM VER 1.3 16 ...