ace24c128 ACE Technology Co., LTD., ace24c128 Datasheet
ace24c128
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ace24c128 Summary of contents
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... Description The ACE24C128/256 provides 131,072/262,144 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows devices to share a common two-wire bus ...
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... Packaging Type Pin Configurations Pin Name Function A0~A2 Device Address Inputs SDA Serial Data Input / Output SCL Serial Clock Input WP Write Protect VCC Power Supply GND Ground Technology ACE24C128/256 Two-wire Serial EEPROM VER 1.2 2 ...
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... Block Diagram Technology Figure 1 ACE24C128/256 Two-wire Serial EEPROM VER 1.2 3 ...
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... GND. Write Protect (WP): The ACE24C128/256 has a Write Provides hardware data protection. The WP pin allows normal write operations when connected to ground (GND). When the Write Protect pin is connected to Vcc. All write operations to the memory are inhibited. If the pin is left floating, the WP pin will be internally pulled is < ...
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... Memory Organization ACE24C128, 128K Serial EEPROM: Internally organized with 256 pages of 64 bytes each, Random word addressing requires a 14-bit data word address ...
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... Notes:1. This parameter is characterized and not 100% tested. 2.AC measurement conditions: RL (connects to Vcc): 1.3kΩ Input pulse voltages: 0.3 Vcc to 0.7 Vcc Input rise and fall times: ≦50 ns Input and output timing reference voltages: 0.5Vcc Technology Parameter ACE24C128/256 Two-wire Serial EEPROM 1.7-volt 2.5-volt 5.5-volt Min Max Min Max Min Max 400 1000 1000 1 ...
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... EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. Standby Mode : The ACE24C128/256 features a low-power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the stop bit and the completion of any internal operations. Memory Reset : ...
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... Figure 3．SCL: Serial Clock, SDA: Serial Data I/O Note: The write cycle time t is the time from a valid stop condition of a write sequence to the end of the internal clear/write WR cycle. Figure 6．Output Acknowledge Technology Figure 4．Data Validity Figure 5．Start and Stop Definition ACE24C128/256 Two-wire Serial EEPROM VER 1.2 8 ...
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... Special internal circuitry place on the SDA and SCL pins prevent small noise spikes from activating the device. Date Security: The ACE24C128/256 has a hardware data protect scheme that slows the user to write protect the entire memory when the WP pin is at Vcc. Write Operations ...
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... The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (refer to Figure 12 MSB Figure 7．Device Address Technology ACE24C128/256 Two-wire Serial EEPROM R/W LSB VER 1.2 10 ...
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... Figure 10．Current Address Read Technology Figure 8．Byte Write Figure 9．Page Write ACE24C128/256 Two-wire Serial EEPROM VER 1.2 11 ...
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... Technology Figure 11． Random Read Figure 12． Sequential Read ACE24C128/256 Two-wire Serial EEPROM VER 1.2 12 ...
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... Packaging information PDIP-8 Note: Dimensions in Millimeters. Technology ACE24C128/256 Two-wire Serial EEPROM VER 1.2 13 ...
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... SOP-8 Note: Dimensions in Millimeters. Technology ACE24C128/256 Two-wire Serial EEPROM VER 1.2 14 ...
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... TSSOP-8 Note: Dimensions in Millimeters. Technology ACE24C128/256 Two-wire Serial EEPROM VER 1.2 15 ...
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... A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness. Technology Notes ACE Technology Co., LTD. http://www.ace-ele.com/ ACE24C128/256 Two-wire Serial EEPROM VER 1.2 16 ...