ace24c1024 ACE Technology Co., LTD., ace24c1024 Datasheet
ace24c1024
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ace24c1024 Summary of contents
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... Description The ACE24C1024 provides wide voltage of 1,048,576 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 131,072 words of 8 bits each. The device can be connected in series to achieve the characteristics of the four devices to share a two-wire system addressable bus ...
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... Packaging Type Pin Configurations Pin Name Function A1~A2 Device Address Inputs SDA Serial Data Input / Output SCL Serial Clock Input WP Write Protect VCC Power Supply GND Ground NC Not Connect Technology ACE24C1024 Two-wire Serial EEPROM VER 1.3 2 ...
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... Block Diagram Technology Figure 1 ACE24C1024 Two-wire Serial EEPROM VER 1.3 3 ...
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... GND if the capacitive coupling to the circuit board Vcc plane is < 3pF, if coupling is > 3pF recommends connecting the address pins to GND. Write Protect (WP): The ACE24C1024 has a Write Provides hardware data protection. The WP pin allows normal write operations when connected to ground (GND). When the Write Protect pin is connected to Vcc. All write operations to the memory are inhibited. ...
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... V A Test Condition V = 5.0V, Read at 400K 5.0V, Write at 400K 1.7V 5.0V OUT V = 1.7V 3.0V Parameter ACE24C1024 Two-wire Serial EEPROM = +1.7V. CC Max Units +1.7V to +3.5V, (unless otherwise noted). CC Min Typ 1.7 0.4 2 ...
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... EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. Standby Mode : The ACE24C1024 features a low-power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the stop bit and the completion of any internal operations. Memory Reset : ...
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... Figure 2．SCL: Serial Clock, SDA: Serial Data I/O Write Cycle Timing Figure 3．SCL: Serial Clock, SDA: Serial Data I/O Note: The write cycle time t is the time from a valid stop condition of a write sequence to the end of the internal clear/write WR cycle. Technology Figure 4．Data Validity ACE24C1024 Two-wire Serial EEPROM VER 1.3 7 ...
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... Special internal circuitry place on the SDA and SCL pins prevent small noise spikes from activating the device. Date Security: The ACE24C1024 has a hardware data protect scheme that slows the user to write protect the entire memory when the WP pin is at Vcc. Technology Figure 5． ...
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... Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input zero but does generate a following stop condition (refer to Figure 10). Technology ACE24C1024 Two-wire Serial EEPROM to the nonvolatile WR, VER 1 ...
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... The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (refer to Figure 12 MSB Figure 7．Device Address Technology R Figure 8．Byte Write ACE24C1024 Two-wire Serial EEPROM LSB VER 1.3 10 ...
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... Figure 10．Current Address Read Technology Figure 9．Page Write Figure 11． Random Read ACE24C1024 Two-wire Serial EEPROM VER 1.3 11 ...
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... Technology Figure 12． Sequential Read ACE24C1024 Two-wire Serial EEPROM VER 1.3 12 ...
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... Packaging information PDIP-8 Technology ACE24C1024 Two-wire Serial EEPROM VER 1.3 13 ...
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... SOP-8 Technology ACE24C1024 Two-wire Serial EEPROM VER 1.3 14 ...
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... TSSOP-8 Technology ACE24C1024 Two-wire Serial EEPROM VER 1.3 15 ...
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... A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness. Technology Notes ACE Technology Co., LTD. http://www.ace-ele.com/ ACE24C1024 Two-wire Serial EEPROM VER 1.3 16 ...