cdp1882d Intersil Corporation, cdp1882d Datasheet

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cdp1882d

Manufacturer Part Number
cdp1882d
Description
Cmos 6-bit Latch And Decoder Memory Interfaces
Manufacturer
Intersil Corporation
Datasheet
March 1997
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• Performs Memory Address Latch and Decoder
• Decodes Up to 16K Bytes of Memory
• Interfaces Directly with CDP1800-Series Microproces-
• Can Replace CDP1866 and CDP1867 (Upward Speed
Ordering Information
Pinouts
PDIP
PDIP
PDIP
SBDIP
PACKAGE
Functions Multiplexed or Non-Multiplexed
sors at Maximum Clock Frequency
and Function Capability)
Burn-In
CDP1881CE
CDP1882CE
CDP1882CEX
CLOCK
MWR
MRD
MA5
MA4
MA3
MA2
MA1
MA0
V
5V
SS
-
10
1
2
3
4
5
6
7
8
9
CDP1881C
TOP VIEW
CDP1882D
(PDIP)
|
Copyright
10V
-
-
-
18
17
16
15
14
13
12
©
20
19
11
-40 to +85
-40 to +85
-40 to +85
-40 to +85
Intersil Corporation 1999
RANGE
TEMP.
V
A8
A9
A10
A11
CS0
CS1
CS2
CS3
CE
(
o
DD
C)
CDP1882, CDP1882C
E20.3
E18.3
E18.3
D18.3
PKG.
NO.
4-1
Description
The CDP1881C, CDP1882 and CDP1882C are CMOS 6-bit
memory latch and decoder circuits intended for use in
CDP1800 series microprocessor systems. They can inter-
face directly with the multiplexed address bus of this system
at maximum clock frequency, and up to four 4K x 8-bit mem-
ories to provide a 16K byte memory system. With four 2K x
8-bit memories an 8K byte system can be decoded.
The devices are also compatible with non-multiplexed
address bus microprocessors. By connecting the clock input
to V
decoded outputs can be used in general purpose memory-
system applications.
The CDP1881C, CDP1882 and CDP1882C are intended for
use with 2K or 4K byte RAMs and are identical except that in
the CDP1882 MWR and MRD are excluded.
The CDP1882 is functionally identical to the CDP1882C. It
differs in that the CDP1882 has recommended operating
voltage range of 4V to 10.5V and the C version has a recom-
mended operating voltage range of 4V to 6.5V.
The CDP1881C, CDP1882 and CDP1882C are supplied in
20 lead and 18 lead packages, respectively. The
CDP1881C is supplied only in a dual-in-line plastic pack-
age (E suffix). The CDP1882 is supplied in dual-in-line,
hermetic side-brazed ceramic (D suffix) and in plastic (E
suffix) packages.
DD
, the latches are in the data-following mode and the
and Decoder Memory Interfaces
CLOCK
MA5
MA4
MA3
MA2
MA1
MA0
V
CE
SS
CDP1882, CDP1882C
(PDIP, CERDIP)
1
2
3
4
5
6
7
8
9
CDP1881C,
TOP VIEW
CMOS 6-Bit Latch
18
17
16
15
14
13
12
11
10
File Number
V
A8
A9
A10
A11
CS0
CS1
CS2
CS3
DD
1367.2

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cdp1882d Summary of contents

Page 1

... Maximum Clock Frequency • Can Replace CDP1866 and CDP1867 (Upward Speed and Function Capability) Ordering Information PACKAGE 5V 10V PDIP CDP1881CE - PDIP CDP1882CE - PDIP CDP1882CEX - Burn-In SBDIP - CDP1882D Pinouts CDP1881C (PDIP) TOP VIEW 1 CLOCK MA5 2 3 MA4 MA3 4 MA2 5 MA1 6 MA0 7 ...

Page 2

Absolute Maximum Ratings DC Supply Voltage Range (All Voltages Referenced to V Terminal) SS CDP1882 . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

Static Electrical Specifications V O PARAMETER SYMBOL (V) Input Leakage Current I Any IN Input Operating Current DD1 (Note Input Capacitance Output Capacitance C - OUT Minimum Data V DR Retention ...

Page 4

INPUTS (NOTE 1) (NOTE 1) MWR MRD ...

Page 5

Dynamic Electrical Specifications PARAMETER PROPAGATION DELAY TIMES Chip Enable to Chip Select MRD or MRW to Chip Select (Note 3) CLOCK to Chip Select CLOCK to Address Memory Address to Chip Select Memory Address to Address NOTES Typical ...

Page 6

Signal Descriptions/Pin Functions CLOCK: Latch-Input Control - a high at the clock input will allow data to pass through the latch to the output pin. Data is latched on the high to low transition of the clock input. This input ...

Page 7

CDP1881C, CDP1882, CDP1882C WAIT CLR TPA CDP1800 ADDRESS BUS SERIES CPU MRD MWR FIGURE 5. CDP1800-SERIES SYSTEM USING THE CDP1882 CDP1882 LATCH/ DECODER CS3 CLK CS2 CS1 CE CS0 MA0 - MA5 A8 - A11 WAIT CLR A8 - A11 ...

Page 8

... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

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