54ls196 Freescale Semiconductor, Inc, 54ls196 Datasheet

54ls196

Manufacturer Part Number

54ls196

Description

4-stage Presettable Ripple Counters

Manufacturer

Freescale Semiconductor, Inc

Datasheet

1.54LS196.pdf (8 pages)

Current page: 1 of 8
Download datasheet (228Kb)

4-STAGE PRESETTABLE

RIPPLE COUNTERS

vide-by-five sections which can be combined to count either in BCD (8, 4, 2, 1)

sequence or in a bi-quinary mode producing a 50% duty cycle output. The

SN54/74LS197 contains divide-by-two and divide-by-eight sections which

can be combined to form a modulo-16 binary counter. Low Power Schottky

technology is used to achieve typical count rates of 70 MHz and power dis-

sipation of only 80 mW.

inputs and asynchronously forces all outputs LOW. A Parallel Load input (PL)

overrides clocked operations and asynchronously loads the data on the Par-

allel Data inputs (P n ) into the flip-flops. This preset feature makes the circuits

usable as programmable counters. The circuits can also be used as 4-bit

latches, loading data from the Parallel Data inputs when PL is LOW and stor-

ing the data when PL is HIGH.

NOTES:

a. 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW.

b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)

c. In addition to loading shown, Q 0 can also drive CP 1 .

PIN NAMES

CP 0

CP 1 (LS196)

CP 1 (LS197)

P 0 –P 3

Q 0 –Q 3

Temperature Ranges.

The SN54/74LS196 decade counter is partitioned into divide-by-two and di-

Both circuit types have a Master Reset (MR) input which overrides all other

Low Power Consumption — Typically 80 mW

High Counting Rates — Typically 70 MHz

Choice of Counting Modes — BCD, Bi-Quinary, Binary

Asynchronous Presettable

Asynchronous Master Reset

Easy Multistage Cascading

Input Clamp Diodes Limit High Speed Termination Effects

V CC

Q 2

CONNECTION DIAGRAM DIP (TOP VIEW)

Clock (Active LOW Going Edge)

Input to Divide-by-Two Section

Clock (Active LOW Going Edge)

Input to Divide-by-Five Section

Clock (Active LOW Going Edge)

Input to Divide-by-Eight Section

Master Reset (Active LOW) Input

Parallel Load (Active LOW) Input

Data Inputs

Outputs (Notes b, c)

Q 3

P 2

P 3

P 0

Q 0

P 1

CP 1

Q 1

CP 0

GND

NOTE:

The Flatpak version

has the same pinouts

(Connection Diagram) as

the Dual In-Line Package.

FAST AND LS TTL DATA

1.0 U.L.

2.0 U.L.

1.0 U.L.

0.5 U.L.

HIGH

10 U.L.

LOADING (Note a)

5-372

5 (2.5) U.L.

LOW

1.75 U.L.

0.25 U.L.

1.5 U.L.

0.8 U.L.

0.5 U.L.

SN54/74LS196

SN54/74LS197

4-STAGE PRESETTABLE

ORDERING INFORMATION

LOW POWER SCHOTTKY

SN54LSXXXJ

SN74LSXXXN

SN74LSXXXD

RIPPLE COUNTERS

CP 0

CP 1

LOGIC SYMBOL

V CC = PIN 14

GND = PIN 7

P 0

Q 0

4 10 3 11

Q 1 Q 2 Q 3

P 1 P 2 P 3

Ceramic

Plastic

SOIC

CASE 751A-02

CASE 632-08

CASE 646-06

CERAMIC

N SUFFIX

D SUFFIX

J SUFFIX

PLASTIC

SOIC

Related parts for 54ls196

54ls196 Summary of contents

Page 1

PRESETTABLE RIPPLE COUNTERS The SN54/74LS196 decade counter is partitioned into divide-by-two and di- vide-by-five sections which can be combined to count either in BCD ( sequence bi-quinary mode producing a 50% duty cycle ...

Page 2

SN54/74LS196 SN54/74LS197 LOGIC DIAGRAM LS196 ...

Page 3

SN54/74LS196 SN54/74LS197 FUNCTIONAL DESCRIPTION The LS196 and LS197 are asynchronously presettable de- cade and binary ripple counters. The LS196 Decade Counter is partitioned into divide-by-two and divide-by-five sections while the LS197 is partitioned into divide-by-two and divide- by-eight sections, with ...

Page 4

SN54/74LS196 SN54/74LS197 GUARANTEED OPERATING RANGES Symbol Parameter V CC Supply Voltage T A Operating Ambient Temperature Range I OH Output Current — High I OL Output Current — Low DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE Symbol Symbol Parameter Parameter V ...

Page 5

SN54/74LS196 SN54/74LS197 AC CHARACTERISTICS ( Symbol Symbol Symbol Parameter Parameter Parameter f MAX Maximum Clock Frequency t PLH CP 0 Input to t PHL Q 0 Output t PLH CP 1 Input to t PHL Q ...

Page 6

SN54/74LS196 SN54/74LS197 1 PHL t PLH 1 NOTE LOW Figure 1 rec CP 1 PHL Q 1.3 ...

Page 7

P - SEATING PLANE 0.25 (0.010 - - -T- SEATING PLANE ...

Page 8

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...

Related keywords

54ls196 datasheet
54ls196 data sheet
54ls196 pdf datasheet
54ls196 component
54ls196 part
54ls196 distributor
54ls196 RoHS
54ls196 datasheet download