gvt72128a8 ETC-unknow, gvt72128a8 Datasheet

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gvt72128a8

Manufacturer Part Number
gvt72128a8
Description
With Single Chip Enable Revolutionary Pinout
Manufacturer
ETC-unknow
Datasheet
FEATURES
• Fast access times: 10, 12, 15and 20ns
• Fast OE# access times: 5, 6, 7 and 8ns
• Single +5V +10% power supply
• Fully static -- no clock or timing strobes necessary
• All inputs and outputs are TTL-compatible
• Three state outputs
• Center power and ground pins for greater noise immunity
• JEDEC standard for functionality and revolutionary pinout
• Easy memory expansion with CE# and OE# options
• Automatic CE# power down
• High-performance, low-power consumption, CMOS
OPTIONS
• Timing
• Packages
• Power consumption
• Temperature
Galvantech, Inc. 3080 Oakmead Village Drive, Santa Clara, CA 95051
Tel (408) 566-0688
Rev. 12/96
GALVANTECH
ASYNCHRONOUS
SRAM
double-poly, double-metal process
10ns access
12ns access
15ns access
20ns access
32-pin SOJ (400 mil)
32-pin SOJ (300 mil)
Standard
Low
Commercial
Industrial
Fax (408) 566-0699
-10
-12
-15
-20
MARKING
J
SJ
None
L
None
I
(
(
0°C
-40°C
, INC.
to
70°C)
to
85°C)
REVOLUTIONARY PINOUT 128K X 8
GENERAL DESCRIPTION
using a four-transistor memory cell with a high performance,
silicon gate, low-power CMOS process. Galvantech SRAMs
are fabricated using double-layer polysilicon, double-layer
metal technology.
improved performance and noise immunity. Static design
eliminates the need for external clocks or timing strobes. For
increased system flexibility and eliminating bus contention
problems, this device offers chip enable (CE#) and output
enable (OE#) with this organization.
enable (WE#) and chip enable (CE#) inputs are both LOW.
Reading is accomplished when (CE#) and (OE#) go LOW
with (WE#) remaining HIGH. The device offers a low power
standby mode when chip is not selected. This allows system
designers to meet low standby power requirements.
The GVT72128A8 is organized as a 131,072 x 8 SRAM
This device offers center power and ground pins for
Writing to these devices is accomplished when write
128K x 8 SRAM
WITH SINGLE CHIP ENABLE
REVOLUTIONARY PINOUT
W E #
D Q 1
D Q 2
VCC
D Q 3
D Q 4
VSS
CE#
A16
A15
A14
A13
A3
A2
A1
A0
PIN ASSIGNMENT
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1
2
3
4
5
6
7
8
9
32-Pin SOJ
3 2
3 1
3 0
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
GVT72128A8
Galvantech, Inc. reserves the right to change
products or specifications without notice.
A4
A5
A6
A7
OE#
D Q 8
D Q 7
VSS
VCC
D Q 6
D Q 5
A8
A9
A10
A11
A12

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