w39l020 Winbond Electronics Corp America, w39l020 Datasheet
w39l020
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w39l020 Summary of contents
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... GENERAL DESCRIPTION The W39L020 is a 2Mbit, 3.3-volt only CMOS flash memory organized as 256K u 8 bits. For flexible erase capability, the 2Mbits of data are divided into 4 uniform sectors of 64 Kbytes, which are composed of 16 smaller even pages with 4 Kbytes. The byte-wide (u 8) data appears on DQ7 DQ0. ...
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... DQ3 DQ2 23 DQ0 DQ7 DQ1 22 DQ0 # #OE # W39L020 DD SS OUTPUT CONTROL BUFFER CORE . DECODER ARRAY . PIN NAME Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Power Supply Ground SS DQ0 . . DQ7 ...
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... Device Bus Operation Read Mode The read operation of the W39L020 is controlled by #CE and #OE, both of which have to be low for the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip is de-selected and only standby power will be consumed. #OE is the output control and is used to gate data from the output pins ...
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... The manufacturer and device codes may also be read via the command register, for instance, when the W39L020 is erased or programmed in a system without access to high voltage on the A9 pin. The command sequence is illustrated in "Auto-select Codes". Byte 0 ( represents the manufacturercs code (Winbond = DAH) and byte 1 ( device identifier code (W39L020 = B5hex) ...
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... The operation is initiated by writing the auto-select command sequence into the command register. Following the command write, a read cycle from address XX00H retrieves the manufacture code of DAH. A read cycle from address XX01H returns the device code (W39L020 = B5hex). To terminate the operation necessary to write the auto-select exit command sequence into the register ...
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... DQ7, Data Polling, is "1" at which time the device returns to the read mode. Data Polling must be performed at an address within any of the sectors/pages being erased. Refer to the Erase Command flow Chart using typical command strings and bus operations W39L020 ...
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... Erase Algorithm, or sector erase time-out (see "Command Definitions"). DQ6: Toggle Bit The W39L020 also features the "Toggle Bit" method to indicate to the host system that the embedded algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (#OE toggling) data from the device at any address will result in DQ6 toggling between one and zero ...
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... Read Write Standby Write Inhibit Output Disable Auto select Manufacturers ID Auto select Device ID Auto-select Codes (High Voltage Method 0.5V) ID DESCRIPTION Manufacturer ID: Winbond Device ID: W39L020 Sector Address Table A17 SECTOR SA0 0 SA1 0 SA2 1 SA3 1 Note: All sectors are 64K bytes in size. ...
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... SA = 12XXXh for Page 2 in Sector1 SA = 21XXXh for Page 1 in Sector2 SA = 11XXXh for Page 1 in Sector1 SA = 20XXXh for Page 0 in Sector2 SA = 10XXXh for Page 0 in Sector1 Publication Release Date: November 11, 2002 - 9 - W39L020 7TH CYCLE Addr. Data Addr. Data 2AAA 55 5555 10 2AAA 55 SA ...
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... Embedded Programming Algorithm Increment Address Program Command Sequence (Address/Command): Start Write Program Command Sequence (see below) #Data Polling/ Toggle bit No Last Address ? Yes Programming Completed 5555H/AAH 2AAAH/55H 5555H/A0H Program Address/Program Data - 10 - W39L020 Pause T BP ...
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... Start (see below) Pause T Erasure Completed Individual Sector Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H Sector Address/30H Publication Release Date: November 11, 2002 - 11 - W39L020 / SEC PEC Individual Page Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H Page Address/50H ...
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... DQ7) Address = Don't Care Yes DQ6 = Toggle ? No Pass - 12 - W39L020 VA = Byte address for programming = Any of the sector addresses within the sector being erased during sector erase operation = Any of the page addresses within the page being erased during page erase operation = Any of the device addresses being ...
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... Load data 40/70 to address 5555 Load data XX to address 3FFFF lock 64K Boot Block 70 to lcok 16K Boot Block 3FFFF(XX) to lock Top Boot Block 000000(XX) to lock Bottom Boot Block Publication Release Date: November 11, 2002 - 13 - W39L020 Pause 2mS Exit Revision A4 ...
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... Read address=02/3FFF2 for Bottom/Top data:in DQ0="1" or "0" for 64K Boot Block or DQ1="1" or "0" for 16K Boot Block ; device code is read for W39L020 Product Identification Exit(6) Load data AA to address 5555 Load data 55 to ...
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... OUT 2 -0 SYMBOL CONDITIONS OUT OUT Publication Release Date: November 11, 2002 - 15 - W39L020 RATING UNIT -2 +70 qC -65 to +125 qC -2.0 to +4.6 V -2.0 to +13.0 V LIMITS UNIT MIN. TYP. MAX ...
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... AC Test Conditions PARAMETER Input Pulse Levels Input Rise/Fall Time Input/Output Timing Level Output Load AC Test Load and Waveform <5 nS 1.5V/1.5V 1 TTL Gate and C +3.3V 1.2K D OUT 30 pF (Including Jig and Scope) 2.1K Input Output 3V 1.5V 1.5V 0V Test Point Test Point - 16 - W39L020 CONDITIONS = ...
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... T 0 OEH T 100 CP T 100 WP T 100 WPH and (b) low level signal's reference level Publication Release Date: November 11, 2002 - 17 - W39L020 W39L020-90 UNIT MIN. MAX TYP. ...
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... Data Polling Output Delay #OE to Toggle Bit Output Delay #CE to Toggle Bit Output Delay SYMBOL T . READ WRITE PU W39L020-70 SYM. MIN. MAX. MIN OEP CEP OET CET - 18 - W39L020 TYPICAL UNIT 100 W39L020-90 UNIT MAX ...
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... Controlled Command Write Cycle Timing Diagram Address A17-0 #CE #OE #WE DQ7 OLZ T CLZ T OH Data Valid OES Data Valid Publication Release Date: November 11, 2002 - 19 - W39L020 T OHZ T CHZ High-Z Data Valid OEH T WPH T DH Revision A4 ...
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... SB0 OES High Z Six-byte code for 3.3V-only software chip erase 5555 5555 2AAA WPH SB2 SB3 SB1 - 20 - W39L020 T CPH CP T OEH T DS Data Valid T DH 2AAA 5555 Internal Erase starts SB5 SB4 ...
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... DQ7 Six-byte commands for 3.3V-only Sector/Page Erase 5555 5555 2AAA 2AAA WPH SB2 SB3 SB4 SB1 CEP T OEH T OEP Publication Release Date: November 11, 2002 - 21 - W39L020 SA/PA 55 30/ Internal Erase starts SB5 OES X X Revision A4 ...
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... Timing Waveforms, continued Toggle Bit Timing Diagram Address A17-0 #WE #CE #OE DQ6 T OEH W39L020 T OES ...
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... Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. 12. HOW TO READ THE TOP MARKING Example: The top marking of 32-pin TSOP W39L020T-70 W39L020T-70 2138977A-A12 149OBSA ...
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... TSOP ( mm 0.10(0.004 W39L020 Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.140 3.56 A 0.020 0. 0.105 0.110 0.115 2.67 2.80 2. 0.026 0.032 0.66 0.81 0.028 0. ...
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... A 0.002 0.035 b 0.007 E c 0.004 0.020 0.000 Publication Release Date: November 11, 2002 - 25 - W39L020 Dimension in mm Min. Nom. Max. Nom. Max. 0.047 1.20 0.006 0.05 0.15 0.040 0.95 1.00 0.041 1.05 0.009 0.010 0.17 0.22 0.27 0.10 0.008 ----- 0.21 ----- 0.488 12.40 0.315 8.00 0.551 14.00 0.020 0.50 0.024 ...
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... TEL: 1-408-9436666 FAX: 1-408-5441798 Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 26 - W39L020 DESCRIPTION Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No ...