ta1318afg TOSHIBA Semiconductor CORPORATION, ta1318afg Datasheet

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ta1318afg

Manufacturer Part Number
ta1318afg
Description
Sync Processor, Frequency Counter Ic For Tv Component Signals
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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SYNC Processor, Frequency Counter IC for TV Component Signals
TA1318AFG is a sync processor for TV component signals.
for external input signals.
package.
and controls are adjustable via the bus.
Features
TA1318AFG provides sync and frequency counter processing
These functions are integrated in a 30 pin SSOP-type plastic
TA1318AFG provides I
Horizontal synchronization circuit (15.75 kHz, 31.5 kHz, 33.75
kHz, 45 kHz)
Vertical synchronization circuit (525I, 525P, 625I, 750P, 1125I, 1125P, PAL 100 Hz, NTSC 120 Hz)
Horizontal and vertical frequency counter
Horizontal PLL
Accepts 2-level and 3-level sync
Accepts both negative and positive HD and VD
Clamp pulse output
HD, VD output (polarity inverter)
Separated sync output
Mask for the copy guard signal
TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
2
C bus interface, so various functions
TA1318AFG
1
Weight: 0.63 g (typ.)
TA1318AFG
2006-02-27

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ta1318afg Summary of contents

Page 1

... TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic SYNC Processor, Frequency Counter IC for TV Component Signals TA1318AFG is a sync processor for TV component signals. TA1318AFG provides sync and frequency counter processing for external input signals. These functions are integrated pin SSOP-type plastic package. ...

Page 2

... Analog GND NC AFC Filter NC HVCO 2 SCL SDA NC HD2-OUT Digital GND CBUS INV Decoder SW HD2-OUT SW V-FREQ V C Pulse × C/D H-Ramp H-FREQ DAC2 VD3-IN CC TA1318AFG NC HD1-OUT 17 16 INV SW HD1-OUT HD3-IN CP-OUT 2006-02-27 ...

Page 3

... Input signal from this pin is not synchronized. Input vertical sync signal. It accepts input of both positive 2 VD2-IN and negative polarity. Input signal from this pin is not synchronized. Interface Circuit 11 1 kΩ kΩ TA1318AFG Input Signal/Output Signal Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2006-02-27 ...

Page 4

... Input signal from this pin is not synchronized. GND pin for analog circuit 5 Analog GND blocks. 6 N.C. Connect to GND. Interface Circuit 11 1 kΩ kΩ ⎯ ⎯ 4 TA1318AFG Input Signal/Output Signal Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V ⎯ ⎯ 2006-02-27 ...

Page 5

... Connect ceramic oscillator for horizontal oscillation. 9 HVCO Use Murata CSBLA503KECZF30. 10 N.C. Connect to GND. VCC pin Connect 9 V (typ.). Interface Circuit 11 300 Ω 30 kΩ ⎯ kΩ kΩ 10 kΩ 5 ⎯ ⎯ 5 TA1318AFG Input Signal/Output Signal DC ⎯ ⎯ ⎯ ⎯ 2006-02-27 ...

Page 6

... It accepts input of both positive and negative polarity. Input horizontal sync signal. 14 HD3-IN It accepts input of both positive and negative polarity. Interface Circuit 11 200 Ω kΩ kΩ TA1318AFG Input Signal/Output Signal DC or H/C SYNC Th: 0 Th: 0.7 V Th: 0 Th: 0.7 V 2006-02-27 ...

Page 7

... HD1/HD2 input signals are 16 HD1-OUT output from this pin without synchronization. Polarity is switched by BUS write function. 17 N.C. Connect to GND. 18 Digital GND GND pin for logic blocks. Interface Circuit 11 200 Ω 200 Ω ⎯ ⎯ 7 TA1318AFG Input Signal/Output Signal 5 ⎯ ⎯ 2006-02-27 ...

Page 8

... HD1/HD2 input signals are 19 HD2-OUT output from this pin without synchronization. Polarity is switched by BUS write function. 20 N.C. Connect to GND SDA SDA pin for I C bus. Interface Circuit 11 200 Ω ⎯ 50 Ω 20 kΩ SDA 21 ACK 8 TA1318AFG Input Signal/Output Signal or ⎯ 11 ⎯ 2006-02-27 ...

Page 9

... SCL pin for I C bus. Slave address switch pin. When this pin is connected to 23 Address SW V (GND), used for DC/DD CC (D8/D9 ); when left open, H DA/ Interface Circuit 20 kΩ SCL 22 1 kΩ Input Signal/Output Signal DC/DD 7.5 V DA/DB 1.5 V D8/D9 5 TA1318AFG ⎯ 7 2006-02-27 ...

Page 10

... This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. Interface Circuit kΩ 200 Ω TA1318AFG Input Signal/Output Signal White 100% p− SYNC 2006-02-27 ...

Page 11

... This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. Interface Circuit kΩ 5 ⎯ 11 200 Ω TA1318AFG Input Signal/Output Signal White 100% p−p or ⎯ Start phase or Start phase 2006-02-27 ...

Page 12

... Use the start phase of VD. DAC3 output pin. Open collector output. 30 DAC3 In Test mode, outputs test pulse for shipping. Interface Circuit 11 200 Ω 500 Ω TA1318AFG Input Signal/Output Signal Start phase or Start phase DC or test pulse for shipping 2006-02-27 ...

Page 13

... FREQUENCY DET H FREQUENCY DET *(10): 33.75 kHz (11): 45 kHz (10): HD3/VD3 (11): Synchronized HD/VD (10): HD3/VD3 (11): Synchronized HD/VD (10): 20IRE (11): 25IRE (at 1125I/60) *(10 (11 (10 (11 (1): ON (LOW) 13 TA1318AFG D0 Preset D1 LSB MSB LSB SEPA LEVEL 1000 0000 HD1-INV HD2-INV 1000 0000 INPUT SW 1000 0000 VD1-INV VD2-INV ...

Page 14

... Format/H (V) Frequency 1125P/30 Hz (33.75 kHz) 750P/60 Hz (45 kHz) Free-running frequency is controlled by H-FREQUENCY. (00): 262 H (01): 525 H (10): 562 H (11): 750 H 1125I/60 Hz (33.75 kHz) 525P/60 Hz (31.5 kHz) PAL/SECAM/50 Hz (15.625 kHz) PAL/SECAM double scan/100 Hz (31.5 kHz) NTSC/60 Hz (15.734 kHz) NTSC double scan /120 Hz (31.5 kHz) VD output is HIGH 14 TA1318AFG 2006-02-27 ...

Page 15

... Note 1, Note 2 and the other factors such as signal strength, existence of ghost signal, 2 H-AFC stability BUS data transmission and so on via prototype TV set evaluation. Data 1 and Start trigger 2 More than 3 V Counting period 2 (to Data 1) (to Data 2) 15 TA1318AFG Data 2 and Start trigger 3 2006-02-27 ...

Page 16

... Start and Stop Condition SDA SCL S Start condition Bit Transfer SDA SCL Acknowledge SDA by transmitter SDA by receiver SCL from master 0/1 P Stop condition SDA stable Change of SDA allowed Bit 9: High impedance Clock pulse for acknowledgment 16 TA1318AFG A0 W/R 0/1 0/1 Only bit 9: Low impedance 2006-02-27 ...

Page 17

... HIGH ⎯ t 4.7 SU;STA ⎯ t 280 HD;DAT ⎯ t 250 SU;DAT ⎯ t 4.0 SU;STO ⎯ t 4.7 BUF 17 TA1318AFG ・・・・・・ Transmit data bit MSB Max Unit 1.5 V Vcc V 0.4 V µ 100 kHz ⎯ µs ⎯ µs ⎯ ...

Page 18

... Symbol Rating Unit CCmax GND − 0.3 inmax p 1136 θ ja mW/ ° C 9.1 − 20~65 ° opr − 55~150 ° stg 1136 773 150 Ambient temperature Ta (°C) Figure Curve D 18 TA1318AFG 2006-02-27 ...

Page 19

... When constructing a TV set, please consider to connect an external protection diode or a switch IC between any external input pin and pin 24 or 26. Description Min 8.5 2.0 2.0 0.02 0.45 µ µ 0.9 ⎯ ⎯ D8/ DC/DD 8 TA1318AFG Typ. Max Unit 9.0 9.5 V 5.0 9.0 V p-p 5.0 9.0 ⎯ 0.20 H ⎯ ⎯ 0.25H ⎯ ⎯ ...

Page 20

... HP3 + ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ CP (Note HA08) W1 ⎯ ⎯ ⎯ ⎯ TA1318AFG Unit mA Min Typ. Max Unit 0.6 0.7 0.8 µ s 0.6 0.7 0.8 µ s 0.6 0.7 0 0.040 0.070 0.100 0.060 0.106 0.152 0.081 ...

Page 21

... ID1 ⎯ ID2 (Note HB01) ⎯ ID3 ⎯ ID4 ⎯ (Note HB02) VCO ⎯ ⎯ (Note HB03) ⎯ ⎯ 21 TA1318AFG Min Typ. Max Unit µ s 1.0 1.2 1.4 4.5 5.0 5.5 ⎯ 0.1 0.5 4.5 5.0 5.5 ⎯ 0.1 0.5 V 4.5 5.0 5.5 ⎯ 0.1 0.5 4.5 5.0 5.5 ⎯ ...

Page 22

... Circuit ⎯ F00 ⎯ F01 ⎯ (Note HB04) F10 ⎯ F11 ⎯ F50 ⎯ ⎯ (Note HB05) ⎯ ⎯ ⎯ 10 ⎯ 11 ⎯ ⎯ 12 ⎯ 13 ⎯ 20 ⎯ 21 ⎯ ⎯ 22 ⎯ 23 ⎯ 30 ⎯ ⎯ TA1318AFG Min Typ. Max Unit 15.59 15.75 15.91 31.19 31.5 31.82 kHz 33.41 33.75 34.09 44.55 45 45.45 15.47 15.625 15.78 2.4 3.0 3.6 4.8 6.0 7.2 kHz/V 4.8 6.0 7.2 7.1 8.9 10.7 0.5 1.0 1.5 2.7 3.0 3 ...

Page 23

... V22IL2 ⎯ V22IH3 ⎯ V22IL3 ⎯ V23IH0 ⎯ V23IL0 ⎯ V23IH1 ⎯ V23IL1 ⎯ ⎯ V23IH2 ⎯ V23IL2 ⎯ V23IH3 ⎯ V23IL3 ⎯ ⎯ (Note VA03) ⎯ ⎯ TA1318AFG Min Typ. Max Unit 0.65 0.75 0.85 V 0.65 0.75 0.85 p-p 0.65 0.75 0.85 0.65 0.75 0.85 V p-p 4.5 5.0 5.5 ⎯ 0.1 0.5 4.5 5.0 5.5 ⎯ 0.1 0.5 V 4.5 5.0 5.5 ⎯ ...

Page 24

... Test Test Condition Circuit ⎯ FV0 ⎯ FV1 ⎯ FV3 ⎯ FV4 ⎯ FV5 (Note VA04) ⎯ FV6 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ (Note VA05) ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 24 TA1318AFG Min Typ. Max Unit 26.02 26.35 26.67 39.21 39.75 40.30 52.20 52.98 53.77 54.24 55.06 55.89 91.28 92.98 94.69 Hz 107.8 109.9 112.1 57.0 60.0 63.0 57.0 60.0 63.0 57.0 60 ...

Page 25

... Measure the phase difference ± 3°C, unless otherwise specified) CC between pin 21 and pin 6 (AFC filter) wave form. 1PH between pin 19 and pin 6 (AFC filter) wave form. 2PH 29.63 µs 0.593 µs Signal a 0.285 V ・S S 1PH 2PH Pin 6 wave form TA1318AFG 2006-02-27 ...

Page 26

... Increasing the duty of Signal b to 100% (get negative period longer), measure the duty of Signal b (HD-DUTY2) when the phase between pin 11 and pin 13 (HD1OUT) change. Signal b 26 TA1318AFG = ± 3°C, unless otherwise specified) CC between pin 11 and pin 6 (AFC filter) wave form. ...

Page 27

... ± 3°C, unless otherwise specified sync11 ) when HD-OUT desynchronizes with signal a calculate V sync12 , V and V as well. thS11 thS12 thS13 and V against pin 19 (SYNC2-IN) in the same way thS22 thS23 29.63 µs 0.593 µs 0.285 V thHD3 31.75 µs 2.35 µs V thHD1 TA1318AFG . thS10 when HD1-OUT lock. 2006-02-27 ...

Page 28

... Increasing the voltage of Signal b from 0 V, measure the voltage of Signal b V (4) Measure the voltage of pin 1 V Signal ± 3°C, unless otherwise specified) CC when HD1-OUT lock. thHD1 . Measure the voltage of pin well. thHD2 thHD3 31.75 µs 2.35 µs V thHD1 TA1318AFG 2006-02-27 ...

Page 29

... When horizontal period of Signal 22.22 µs measure ∆HP3− and ∆HP3+ as well. Signal b Pin 15 wave form data (00) Pin 15 wave form data (7C) (80) Pin 15 wave form data (FC) 29 TA1318AFG = ± 3°C, unless otherwise specified µs 2.35 µs 1.5 V ∆HP*− ∆HP*+ 2006-02-27 ...

Page 30

... Measure the clamp pulse phase (CP Signal a. (7) Input no-signal to pin 11. (8) Measure the clamp pulse phase (CP 13 (HD-OUT). Signal a Pin 12 wave form Pin 13 wave form Pin 12 wave form 30 TA1318AFG = ± 3°C, unless otherwise specified width (CP ), output level ( pin 12 (CLP-OUT) against width (CP ...

Page 31

... S21 ⎯ ⎯ b (1) Set sub-address (00) 70. (2) Input Signal b (horizontal 31.5 kHz) to pin 11 (HD3-IN). (3) Set sub-address (02) 62. (4) Measure the pulse width (WdHD) of pin 6 (AFC filter) wave form. Signal b Pin 6 wave form 31 TA1318AFG = ± 3°C, unless otherwise specified) CC 31.75 µs 2.35 µs 1.5 V Wd-HD 2006-02-27 ...

Page 32

... ID4 [µA] = (V4 [V] ÷ 1 [kΩ]) × 1000 Pin 21 wave form Pin 6 wave form ⎯ ⎯ ⎯ (1) Increasing the voltage of pin 8 V wave form ± 3°C, unless otherwise specified) CC 63.5 µs 0.25 V V1, V3 V2, V4 form 2.5V, measure the voltage V when pin 7 appear oscillation CC VCO TA1318AFG 2006-02-27 ...

Page 33

... − 0. pin 6, then measure the frequency FA pin 13 (HD1-OUT) wave form. Calculate frequency changing ratio (BH00). BH00 = (FB − FA)/0.1 (4) When horizontal oscillation frequency is 31.5 kHz (01), 33.75 kHz (10), 45 kHz (11), calculate BH01, BH10, BH11 as wall. 33 TA1318AFG = ± 3°C, unless otherwise specified 2006-02-27 ...

Page 34

... Increasing the voltage of Signal b from 0 V, measure the voltage of Signal a V Signal ± 3°C, unless otherwise specified) CC thVD1 against pin 2 and pin 10 as wall. 16.67 ms 0.12 ms Signal a V thVD1 thVD3 16.67 ms 0.12 ms TA1318AFG when VD1-OUT lock. when VD1-OUT lock. 2006-02-27 ...

Page 35

... When sub-addrss (00) is B0, measure the pulse width VPW2 of pin 22 (VD1-OUT) wave form. (4) When sub-addrss (00) is 30, 70, F0, measure the pulse width VPW0, VPW1, VPW3 of pin 22 (VD1-OUT) wave form as well. Signal a Pin 22 wave form 35 TA1318AFG = ± 3°C, unless otherwise specified) CC 29.63 µs 0.593 µs V period ...

Page 36

... Input no-signal to pin 3 (HD1-IN). (5) Set sub-address (02) 42. (6) When sub-address (00) is 30, 70 F0, measure the frequency FV20, FV21, FV22 or FV23 of pin 22 (VD1-OUT) wave form. Signal a Pin 22 wave form 36 TA1318AFG = ± 3°C, unless otherwise specified) CC 29.63 µs 0.593 µs 0.285 V V period ...

Page 37

... Set sub-address (00) B0. (10) Measure FVPL2 as well. (11) Input Signal a (horizontal period T = 22.22 µs) to pin 11 (HD3-IN). (12) Set sub-address (00) F0. (13) Measure FVPL3 as well. Signal a Signal c Pin 22 wave form 37 TA1318AFG = ± 3°C, unless otherwise specified) CC horizontal period Tµs 0.593 µs 1 period (initial ms) 0.25 ms 1.5 V ...

Page 38

... TA1318AFG SW6 1 kΩ Pin 6 Pin 3 Pin 4 38 SCL SDA #17 #16 # #10 #11 Pin 7 Pin 9 Pin 10 Pin 11 Pin 12 TA1318AFG TP 1- µF TP 2-in # µF #12 ○ Mylar capacitor M 2006-02-27 ...

Page 39

... SYNC1- SYNC2- DAC1 OUT OUT TA1318AFG 360 Ω CSBLA503KECZF30 39 HD2- SCL SDA OUT 0.01 µF 100 µF DAC2 VD3-IN HD3-IN CP-OUT ○ M TA1318AFG HD1- OUT 16 15 Mylar capacitor 2006-02-27 ...

Page 40

... H-AFC stability, I transmission and so on via prototype TV set evaluation. Signal 1 AFC SYNC1-IN for H-AFC Internal pulse (A) Signal 2 SYNC2-IN for H/V freq. counter TA1318AFG 40 TA1318AFG BUS READ H/V FREQ COUNTER 2 C BUS data 2006-02-27 ...

Page 41

... Package Dimensions Weight: 0.63 g (typ.) 41 TA1318AFG 2006-02-27 ...

Page 42

... TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. 021023_C • The products described in this document are subject to the foreign exchange and foreign trade laws. 021023_D 021023_B 060106_Q 42 TA1318AFG 060116EBA 021023_E 2006-02-27 ...

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