cn8223 Mindspeed Technologies, cn8223 Datasheet

cn8223

Manufacturer Part Number

cn8223

Description

Atm Transmitter/receiver With Utopia Interface

Manufacturer

Mindspeed Technologies

Datasheet

1.CN8223.pdf (161 pages)

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CN8223

ATM Transmitter/Receiver with UTOPIA Interface

The CN8223 ATM Transmitter/Receiver with UTOPIA Level 1 interface provides a

single-access ATM service termination for User-to-Network (UNI) and

Network-to-Network Interfacing (NNI) in conformance with ATM Forum UNI and NNI

Specification 94/0317; Bellcore Specifications TR-TSV-000772, TR-TSV-000773,

TR-NWT-000253, and T1S1/92-185; ITU Recommendations I.432, G.707, G.751,

G.832, and Q.921; and ETSI prETS 300 213 and 300 214. Both Customer Premise

Equipment (CPE) and switching system interface functions are provided. The CN8223

provides DS1, E1, DS3, E3, E4, STS-1, and STS-3c (and STM-1) ATM cell alignment

functions. The system interface is via a parallel FIFO port or UTOPIA interface. In

addition, the CN8223 terminates the operations and maintenance flows F1, F2, and F3.

receiver port can be programmed with a particular Virtual Channel Identifier/Virtual

Path Identifier (VCI/VPI) address for message routing. VCI/VPI pages can also be

selected via masking registers.

by the transmitter on an individual port basis. The microprocessor can also control

insertion of all overhead and can insert errors in selected fields for test equipment

applications.

Functional Block Diagram

Control

Data Sheet

Interface

UTOPIA

or FIFO

Data

Port

Bus

The CN8223 provides four FIFO port interfaces and one UTOPIA interface. Each

The microprocessor can set control registers for insertion of selected header fields

FIFO

Cell

Generation

Header

Filter

Interface

Cell

4-Port

FIFO

ATM Layer

Microprocessor

Validation

Control

Address

Rate

Cell

52 Control Registers

28 Status Registors

Microprocessor

Interface

Microprocessor

Alignment

HEC or

Data

PLCP

Cell

Physical Framing

E3 (G.751)

E3 (G.832)

E4 (G.832)

HDLC

Framers

STS-3c

Data

Link

STM-1

Line Overhead

STS-1

TAXI

DS3

ATM

UNI

Distinguishing Features

• Integrates 7 line framers with ATM

• UTOPIA Level 1 interface

• Internal framers for DS3, E3 (G.751,

• PLCP and G.804 HEC cell alignment

• Direct interface to TAXI

• ATM and SMDS cell modes

• 4 FIFO ports with header screening,

• Idle cells generated and screened

• Statistics counts latched on

• Error detection and insertion

• Option insertion or generation of all

• Serial or parallel line interface

• Available evaluation module

• Supports Automatic Protection

Applications

• WAN equipment

• ATM switches

• Test equipment

• ATM routers and hub

layer processing according to ATM

Forum UNI and NNI Specifications

G.832), E4 (G.832), STS-1, STS-3c,

STM-1

for all data rates from 1.544 Mbps to

155 Mbps

T1/E1 framers

formatting, and transmit priority

controls

one-second intervals

line and cell overhead

reference design and software

Switching (APS)

June 2000

or external

100046D

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