lc8904q Sanyo Semiconductor Corporation, lc8904q Datasheet
lc8904q
Available stocks
Related parts for lc8904q
lc8904q Summary of contents
Page 1
... Ordering number : EN*5014B Preliminary Overview The LC8904Q demodulates data transmitted between digital audio equipment in the EIAJ format (CP-1201 normal format signal synchronized with the receiving side input signal. Features • Synchronizes with the transmitted EIAJ format signal using a built-in PLL circuit. ...
Page 2
... Pin Assignment LC8904Q No. 5014-2/20 ...
Page 3
... Block Diagram LC8904Q No. 5014-3/20 ...
Page 4
... Microprocessor interface: clock input 43 DV Digital system power supply DD 44 DIN1 I Data input with built-in amplifier 45 DIN2 I Data input with built-in amplifier 46 DIN3 I Data input with built-in amplifier 47 DIN4 I Data input with built-in amplifier 48 DGND Digital system ground LC8904Q Function No. 5014-4/20 ...
Page 5
... The XIN pin. CMOS compatible. 3. The XMODE and RC1 pins. CMOS Schmitt compatible 5 25°C, and input data with kHz Conditions prior to the capacitances of the DIN1, DIN2, DIN3, and DIN4 pins. LC8904Q Symbol Conditions max DD V · V ...
Page 6
... WBO Output data setup time kHz, load = 30 pF DSO Output data hold time kHz, load = 30 pF DHO Note: When the validity fag is output from the DOUT/V pin. LC8904Q = 4 Conditions min 160 80 80 typ max Unit ...
Page 7
... DS Hold time t DH Delay time t D Latch pulse time t WLA DQSY pulse time 44.1 kHz W Data delay time Data delay time LC8904Q Conditions = min typ max Unit 100 ns 100 100 ns 100 ns 136 µs ...
Page 8
... D3 CL delay time delay time pulse time 44.1 kHz W Data delay time Data delay time Note 1. C bit output 2. Subcode Q output LC8904Q Conditions = min typ max Unit 100 ns 100 1.0 µ 100 ...
Page 9
... CHW SBCK low-level pulse width t *3 CLW SBCK rise time t rC SBCK fall time t fC SBCK delay time data access time t PAC Data hold time t HD LC8904Q = 4 Conditions min 12.0 110 90 4 1.5 2.0 2 typ max Unit 13.3 14.7 ms µs 136 165 µ ...
Page 10
... The LC8904Q subcode interface uses the user bit subcode sync word and start bit for system timing extraction. Therefore, since SBSY and SFSY will change with that timing, user bit transmission must follow the table shown below when using the values of t ...
Page 11
... LC8904Q No. 5014-11/20 ...
Page 12
... LC8904Q No. 5014-12/20 ...
Page 13
... System stop by stopping both the VCO and crystal oscillators (DI4) DI4 System Selection of data to demodulate (DI5, DI6) DI5 DI6 Demodulation data input DIN1 Input data (EIAJ format) output selection DI7 DI8 DOUT/V pin DIN1 LC8904Q CCB/SUB = low ...
Page 14
... An interval of at least longer must be provided between readout operations. Subcode Q — The LC8904Q provides the following two functions for subcode readout subcode interface (CP-2401) is possible 2. Output of subcode Q data with CRC flags included, which corresponds to the CD and MD formats The microprocessor interface uses the readout function of item 2. — ...
Page 15
... DIN1. This configuration can be useful as a simplified circuit evaluation method. CD Subcode Interface The LC8904Q outputs CD subcode data from the SFSY, SBCK, PW, and SBSY pins. These pins output user bits that were transmitted according to the CP-1201 standard and that were converted to the CP-2401 standard. ...
Page 16
... This pin is used for system reset. The system will start to operate normally if this pin is set high after the power supply has risen to at least 4 XMODE is set low, the VCO free-running clock will be output from the CLKOUT1 pin. After application of power, the system will be reset if the XMODE pin is set low again. LC8904Q CLKMD CLKOUT2 ...
Page 17
... Analog Source Mode The LC8904Q enters analog source mode in the following two cases: 1. Analog source mode is selected from the microprocessor interface the input pin specified for data demodulation goes to the no signal state. In this mode, the clock that operates the whole system is taken from the crystal oscillator clock, and the PLL and data demodulation circuits are stopped ...
Page 18
... LC8904Q No. 5014-18/20 ...
Page 19
... Application Circuit Example LC8904Q No. 5014-19/20 ...
Page 20
... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of July, 1996. Specifications and information herein are subject to change without notice. LC8904Q PS No. 5014-20/20 ...