k4x56163p-lg Samsung Semiconductor, Inc., k4x56163p-lg Datasheet
k4x56163p-lg
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k4x56163p-lg Summary of contents
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... K4X56163PI - L(F)E/G 16Mx16 Mobile DDR SDRAM 1. FEATURES • VDD/VDDQ = 1.8V/1.8V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • MRS cycle with address key programs - CAS Latency ( Burst Length ( Burst Type (Sequential & ...
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... K4X56163PI - L(F)E/G 5. FUNCTIONAL BLOCK DIAGRAM Bank Select CK, CK ADD LCKE LRAS LCBR CK, CK CKE 16 CK, CK Data Input Register Serial to parallel 32 2Mx32 2Mx32 2Mx32 2Mx32 Column Decoder Latency & Burst Length Programming Register LWE LCAS LWCBR Timing Register CS RAS CAS Mobile DDR SDRAM ...
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... K4X56163PI - L(F)E/G 6. Package Dimension and Pin Configuration *1 < Bottom View *2: Top View *1: Bottom View *2 < Top View #A1 Ball Origin Indicator > CKE Ball Name ...
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... K4X56163PI - L(F)E/G 7. Input/Output Function Description Symbol Type Clock : CK and CK are differential clock inputs. All address and control input signals are sampled on the cross- CK, CK Input ing of the positive edge of CK and negative edge of CK. Internal clock signals are derived from CK/CK. Clock Enable : CKE HIGH activates, and CKE LOW deactivates internal clock signals, and device input buff- ers and output drivers ...
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... K4X56163PI - L(F)E/G 8. Functional Description POWER POWER APPLIED ON PRECHARGE ALL BANKS EMRS MRS POWER DOWN WRITEA WRITE WRITEA WRITEA PRE Figure 1. State diagram DEEP CKEH POWER DOWN PARTIAL SELF REFRESH DEEP REFRESH POWER DOWN REFS REFSX IDLE MRS REFA ALL BANKS PRECHARGED CKEL ...
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... K4X56163PI - L(F)E/G 9. Mode Register Definition 9.1. Mode Register Set(MRS) The mode register is designed to support the various operating modes of Mobile DDR SDRAM. It includes Cas latency, addressing mode, burst length, test mode and vendor specific options to make Mobile DDR SDRAM useful for variety of applications. The default value of the mode register is not defined, therefore the mode register must be written in the power up sequence of Mobile DDR SDRAM ...
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... K4X56163PI - L(F)E/G Table 1. Burst address ordering for burst length Starting Burst Address Length (A3, A2, A1, A0) xxx0 2 xxx1 xx00 xx01 4 xx10 xx11 x000 x001 x010 x011 8 x100 x101 x110 x111 0000 10, 11, 12, 13, 14,15 0001 10, 11, 12, 13, 14,15, 0 ...
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... K4X56163PI - L(F)E/G 9.2. Extended Mode Register Set(EMRS) The extended mode register is designed to support partial array self refresh or driver strength control. EMRS cycle is not mandatory and the EMRS command needs to be issued only when either PASR used. The default state without EMRS command issued is half driver strength, and Full array refreshed ...
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... K4X56163PI - L(F)E/G 9.3. Internal Temperature Compensated Self Refresh (TCSR order to save power consumption, Mobile DDR SDRAM includes the internal temperature sensor and control units to control the self refresh cycle automatically according to the two temperature ranges ; 45 qC and 85 qC the EMRS for external TCSR is issued by the controller, this EMRS code for TCSR is ignored. ...
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... K4X56163PI - L(F)E/G 10. Absolute maximum ratings Parameter Voltage on any pin relative Voltage on V supply relative Voltage on V supply relative to V DDQ Storage temperature Power dissipation Short circuit current NOTE : 1) Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. 2) Functional operation should be restricted to recommend operation condition. ...
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... K4X56163PI - L(F)E/G 12. DC CHARACTERISTICS Recommended operating conditions (Voltage referenced to V Parameter Symbol tRC=tRCmin; tCK=tCKmin; CKE is HIGH HIGH between valid com- Operating Current IDD0 (One Bank Active) mands; address inputs are SWITCHING; data bus inputs are STABLE all banks idle, CKE is LOW HIGH, tCK = tCKmin; ...
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... K4X56163PI - L(F)E/G 13. AC Operating Conditions & Timming Specification Parameter/Condition Input High (Logic 1) Voltage, all inputs Input Low (Logic 0) Voltage, all inputs Input Crossing Point Voltage, CK and CK inputs NOTE : 1) These parameters should be tested at the pin on actual components and may be checked at either the pin or the pad in simulation. ...
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... K4X56163PI - L(F)E/G 14. AC Timming Parameters & Specifications Parameter CL=2 Clock cycle time CL=3 Row cycle time Row active time RAS to CAS delay Row precharge time Row active to Row active delay Write recovery time Last data in to Active delay Last data in to Read command Col. address to Col. address delay ...
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... K4X56163PI - L(F)E/G Parameter CKE min. pulse width(high and low pulse width) Auto refresh cycle time Exit self refresh to active command Data hold from DQS to earliest DQ edge Data hold skew factor Clock half period NOTE : 1) Input Setup/Hold Slew Rate Derating Input Setup/Hold Slew Rate (V/ns) 1 ...
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... K4X56163PI - L(F)E/G 15. AC Operating Test Conditions Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input signal minimum slew rate Output timing measurement reference level Output load condition Output 10.6K: Output 16. Input/Output Capacitance(V Parameter Input capacitance (A0 ~ A12, BA0 ~ BA1, CKE, CS, RAS,CAS, WE) Input capacitance( CK Data & ...
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... K4X56163PI - L(F)E/G 17. AC Overshoot/Undershoot Specification for Address & Control Pins Parameter Maximum peak Amplitude allowed for overshoot area Maximum peak Amplitude allowed for undershoot area Maximum overshoot area above VDD Maximum undershoot area below VSS VDD Volts (V) VSS Figure 7. AC Overshoot and Undershoot Definition for Address and Control Pins 18 ...
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... K4X56163PI - L(F)E/G 19. Command Truth Table Command Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Auto Precharge Disable Read & Column Address Auto Precharge Enable Auto Precharge Disable Write & Column Address Auto Precharge Enable ...
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... K4X56163PI - L(F)E/G 20. Functional Truth Table Current State CS RAS CAS PRECHARGE STANDBY ACTIVE STANDBY READ ...
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... K4X56163PI - L(F)E/G Current State CS RAS CAS WRITE with AUTO RECHARGE (WRITEA PRECHARGING (DURING tRP ROW ACTIVATING (FROM ROW ...
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... K4X56163PI - L(F)E/G CKE CKE Current State CS n SELF- 8) REFRESHING POWER DOWN DEEP POWER DOWN ALL BANKS IDLE ...