FM24C256FEYYX FAIRCHILD [Fairchild Semiconductor], FM24C256FEYYX Datasheet
FM24C256FEYYX
Related parts for FM24C256FEYYX
FM24C256FEYYX Summary of contents
Page 1
The FM24C256/C256L/C256LZ devices are 256 Kbits CMOS nonvolatile electrically erasable memory. These devices offer the designer different low voltage and low power options. They conform to all requirements in the Extended IIC 2-wire protocol. Furthermore, they are designed to minimize ...
Page 2
FM24C256 rev. B A0, A1, A2 Device Address Input V Ground SS SDA Data I/O SCL Clock Input WP Write Protect V Power Supply ...
Page 3
... FM24C256YYX FM24C256LYYX FM24C256LZYYX FM24C256FYYX FM24C256FLYYX FM24C256FLZYYX FM24C256EYYX FM24C256LEYYX FM24C256LZEYYX FM24C256FEYYX FM24C256FLEYYX FM24C256FLZEYYX FM24C256 rev. B.3 ° ° 4.5V - 5.5V 100KHz 2.7V - 5.5V 4.5V - 5.5V 400KHz 2.7V - 5.5V ° ° 4.5V - 5.5V 100KHz 2.7V - 5.5V 4.5V - 5.5V 400KHz 2. 10µA typical 1µA max 10µA typical 1µA max 10µA typical 1µA max 10µA typical 1µA max ...
Page 4
Ambient Storage Temperature All Input or Output Voltages with Respect to Ground Lead Temperature (Soldering, 10 seconds) ESD Rating I Active Power Supply Current CCA I Standby Current SB I Input Leakage Current LI I Output Leakage Current LO V ...
Page 5
Input Pulse Levels V CC Input Rise and Fall Times 10 ns Input & Output Timing Levels V CC Output Load 1 TTL Gate and C f SCL Clock Frequency SCL T Noise Suppression Time Constant at I SCL, SDA ...
Page 6
SCL t SU:STA t HD:STA SDA IN SDA OUT SCL = Serial Clock Data SDA = Serial Data I/O The IIC bus allows synchronous bidirectional communication be- tween Transmitter/Receiver using the SCL (clock) and SDA (Data I/O) lines. All communication ...
Page 7
ACK (acknowledge software convention used to indicate successful data transfers. The transmitting device, either master or slave, will release the bus after transmitting eight bits. During the ninth clock cycle the receiver will pull the SDA line LOW ...
Page 8
Following a start condition the master must output the address of the slave it is accessing. The most significant four bits of the slave address are those of the device type identifier. This is fixed as 1010 for all different ...
Page 9
Programming of the memory array will not take place if the WP pin is connected The device will accept control and word CC addresses; but if the memory accessed is write protected by the WP pin, the ...
Page 10
SLAVE Bus Activity: R ADDRESS Master SDA Line Bus Activity ADDRESS Bus Activity: R Master SDA Line A C Bus Activity K FM24C256 rev. ...
Page 11
All lead tips Typ. All Leads FM24C256 rev. B.3 0.189 - 0.197 (4.800 ...
Page 12
Pin #1 IDENT 0.280 MIN (7.112) 0.300 - 0.320 (7.62 - 8.128) 95° ± 5° 0.009 - 0.015 (0.229 - 0.381) +0.040 0.325 -0.015 +1.016 8.255 -0.381 Fairchild's products are not authorized for use as ...