IC GATE NAND QUAD 2INP 14-SOIC

MC74AC00DG

Manufacturer Part NumberMC74AC00DG
DescriptionIC GATE NAND QUAD 2INP 14-SOIC
ManufacturerON Semiconductor
Series74AC
MC74AC00DG datasheets
 


Specifications of MC74AC00DG

Logic TypeNAND GateNumber Of Inputs2
Number Of Circuits4Current - Output High, Low24mA, 24mA
Voltage - Supply2 V ~ 6 VOperating Temperature-55°C ~ 125°C
Mounting TypeSurface MountPackage / Case14-SOIC (3.9mm Width), 14-SOL
ProductNANDLogic Family74AC
High Level Output Current- 24 mALow Level Output Current24 mA
Propagation Delay Time9.5 nsSupply Voltage (max)6 V
Supply Voltage (min)2 VMaximum Operating Temperature+ 125 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 55 C
Current, Supply40 μAFunction Type2-Inputs
Logic FunctionNAND GatePackage TypeSOIC-14
Temperature, Operating, Range-55 to +125 °CVoltage, Supply5 V
Rohs CompliantYESOutput Current24mA
No. Of Inputs2Supply Voltage Range2V To 6V
Logic Case StyleSOICNo. Of Pins14
Operating Temperature Range-55°C To +125°CMslMSL 1 - Unlimited
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther namesMC74AC00DG
MC74AC00DGOS
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MC74AC00, MC74ACT00
Quad 2−Input NAND Gate
High−Performance Silicon−Gate CMOS
Features
Output Drive Capability: $24 mA
Operating Voltage Range: 2 to 6 V AC00; 4.5 to 5.5 ACT00
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the JEDEC Standard No. 7A Requirements
Chip Complexity: 32 FETs
Pb−Free Packages are Available
1
A1
2
B1
4
A2
5
B2
9
A3
10
B3
12
A4
13
B4
PIN 14 = V
PIN 7 = GND
Figure 1. Logic Diagram
V
B4
A4
Y4
CC
14
13
12
11
1
2
3
4
A1
B1
Y1
A2
Figure 2. Pinout: 14−Lead Packages (Top View)
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 9
3
Y1
6
Y2
Y = AB
8
Y3
11
Y4
CC
B3
A3
Y3
10
9
8
5
6
7
B2
Y2
GND
1
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP−14
MC74xxx00N
N SUFFIX
AWLYYWWG
CASE 646
14
1
1
14
SOIC−14
xxx00
D SUFFIX
AWLYWWG
CASE 751A
14
1
1
14
TSSOP−14
DT SUFFIX
1
CASE 948G
14
1
14
SOEIAJ−14
74xxx00
M SUFFIX
ALYWG
14
CASE 965
1
1
xxx
= AC or ACT
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
G
= Pb−Free Package
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
MC74AC00/D
xxx
00
ALYWG
G

MC74AC00DG Summary of contents

  • Page 1

    MC74AC00, MC74ACT00 Quad 2−Input NAND Gate High−Performance Silicon−Gate CMOS Features • Output Drive Capability: $24 mA • Operating Voltage Range AC00; 4.5 to 5.5 ACT00 • Low Input Current: 1.0 mA • High Noise Immunity Characteristic ...

  • Page 2

    MAXIMUM RATINGS Symbol V DC Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Sink/Source Current Supply Current ...

  • Page 3

    DC CHARACTERISTICS V CC (V) Symbol Parameter V Minimum High Level 3.0 IH Input Voltage 4.5 5.5 V Maximum Low Level 3.0 IL Input Voltage 4.5 5.5 V Minimum High Level 3.0 OH Output Voltage 4.5 5.5 3.0 4.5 5.5 ...

  • Page 4

    DC CHARACTERISTICS V CC (V) Symbol Parameter V Minimum High Level 4.5 IH Input Voltage 5.5 V Maximum Low Level 4.5 IL Input Voltage 5.5 V Minimum High Level 4.5 OH Output Voltage 5.5 4.5 5.5 V Maximum Low Level ...

  • Page 5

    INPUT 10% t PLH OUTPUT Y 50% Figure 3. Switching Waveforms OUTPUT INPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 4. Test Circuit http://onsemi.com GND ...

  • Page 6

    ... ORDER INFORMATION Device MC74AC00D MC74AC00DG MC74AC00N MC74AC00NG MC74AC00DR2 MC74AC00DR2G MC74AC00DTR2 MC74AC00DTR2G MC74AC00MEL MC74AC00MELG MC74ACT00N MC74ACT00NG MC74ACT00D MC74ACT00DG MC74ACT00DR2 MC74ACT00DR2G MC74ACT00DTR2 MC74ACT00DTR2G MC74ACT00MEL MC74ACT00MELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb− ...

  • Page 7

    ... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

  • Page 8

    −T− SEATING PLANE 0.13 (0.005) PDIP−14 CASE 646−06 ISSUE http://onsemi.com 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

  • Page 9

    ... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

  • Page 10

    ... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...